reg->triminfo_data is used only in exynos_tmu_initialize() and
the code has already different paths for Exynos5440 and other
SoC types (on which TRIMINFO_DATA register offset is identical)
so the register abstraction is not needed and can be removed.

There should be no functional changes caused by this patch.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

* Factor out code for clearing raised IRQs from exynos_tmu_work() to
  exynos_tmu_clear_irqs().

* Add a comment about documentation bugs to exynos_tmu_clear_irqs().

  [ The documentation for Exynos3250, Exynos4412, Exynos5250 and
    Exynos5260 incorrectly states that INTCLEAR register has
    a different placing of bits responsible for FALL IRQs than
    INTSTAT register.  Exynos5420 and Exynos5440 documentation is
    correct (Exynos4210 doesn't support FALL IRQs at all). ]

* Use exynos_tmu_clear_irqs() in exynos_tmu_initialize() instead
  of open-coded code trying to clear IRQs according to predefined
  masks.  After this change exynos_tmu_initialize() just clears
  IRQs that are raised like it is already done in exynos_tmu_work().

  As a nice side-effect the code now uses the correct offset
  (16 instead of 12) for bits responsible for clearing FALL IRQs
  in INTCLEAR register on Exynos3250, Exynos4412 and Exynos5250.

* Remove no longer needed intclr_rise_[mask,shift] and
  intclr_fall_[mask,shift] fields from struct exynos_tmu_registers.

* Remove no longer needed defines.

This patch has been tested on Exynos4412 and Exynos5420 SoCs.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

This patch support many TRIMINFO_CTRL registers if specific Exynos SoC
has one more TRIMINFO_CTRL registers. Also this patch uses proper 'RELOAD'
shift/mask bit operation to set RELOAD feature instead of static value.
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Reviewed-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

There is no need for abstracting configuration for registers that
are identical on all SoC types.

There should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

pdata->reference_voltage and pdata->gain are always defined
to non-zero values so remove the redundant checks from
exynos_tmu_control().

There should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Cache number of non-hardware trigger levels in a new pdata field
(non_hw_trigger_levels) and convert code in exynos_tmu_initialize()
accordingly.

There should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

* Remove dead temp check from temp_to_code() (this function users
  in exynos_tmu_initialize() always pass correct temperatures and
  exynos_tmu_set_emulation() returns early for EXYNOS4210 because
  TMU_SUPPORT_EMULATION flag is not set on this SoC).

* Move temp_code check from code_to_temp() to exynos_tmu_read()
  (code_to_temp() only user).

There should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Remove runtime checks for negative return values of temp_to_code()
from exynos_tmu_initialize().

The current level temperature data hardcoded in pdata will never
cause a negative temp_to_code() return values and checking itself
is not proper.  The checks in question are done at runtime in
a production code for data that is hardcoded inside driver during
development time and later it doesn't change.  Such data should
be verified during development and review time (i.e. by a script
parsing relevant data from exynos_tmu_data.c, one can also argue
that verification to be done is so simple that the review by
a maintainer should be enough).

Theres should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Remove runtime checks for pdata sanity from exynos_tmu_initialize().

The current values hardcoded in pdata will never trigger the checks
and checking itself is not proper.  The checks in question are done
at runtime in a production code for data that is hardcoded inside
driver during development time and later it doesn't change.  Such
data should be verified during development and review time (i.e. by
a script parsing relevant data from exynos_tmu_data.c, one can also
argue that verification to be done is so simple that the review by
a maintainer should be enough).

There should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

The commit 1928457e ("thermal: exynos: Add hardware mode thermal
calibration support") has added HW_MODE feature but it has never
been enabled.  As such it has been a dead code for over a year
now and should be removed from the kernel.

We don't keep the unused/untested features in the kernel just
in case that some future hardware might need it.  Such code has
a real maintainance cost (all other code changes have to take
the dead code into account) and usually makes future changes
more difficult, not easier (i.e. recent additions of Exynos5420
SoC and Exynos5260 SoC thermal support has not made use of any
of the driver's currently unused/untested features, moreover
the recently added code is more complex than needed because of
the existing dead code).  Also all removed dead code is still
accessible in the kernel git repository and can be easily
brought back if/when needed.

There should be no functional changes caused by this patch.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Tested-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

This patch add registers, bit fields and compatible strings for Exynos3250 TMU
(Thermal Management Unit). Exynos3250 uses the Cortex-A7 dual cores and has
a target speed of 1.0 GHz.
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
[Add MUX address setting bits by Jonghwa Lee]
Signed-off-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Amit Daniel Kachhap<amit.daniel@samsung.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

It might not be a problem currently but unregister/uninitialize things
in the reverse order that they are registered/initialized.
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

The site-specific OOM messages are unnecessary, because they
duplicate the MM subsystem generic OOM message.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

Currently the threshold limits are updated in 2 stages, once for all
software trigger levels and again for hardware trip point.

While updating the software trigger levels, it overwrites the threshold
limit for hardware trip point thereby forcing the Exynos core to issue
an emergency shutdown.

Updating only the required fields in threshold register fixes this issue.
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Acked-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

This patch adds the registers, bit fields and compatible strings
required to support for the 5 TMU channels on Exynos5260.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Exynos5420 has 5 TMU channels, the TRIMINFO register is
misplaced for TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a0000 contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2

This patch
1 Adds the neccessary register changes and arch information
   to support Exynos5420 SoCs.
2. Handles the gate clock for misplaced TRIMINFO register
3. Updates the Documentation at
   Documentation/devicetree/bindings/thermal/exynos-thermal.txt
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Acked-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.

To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the "reg" property of the node.

As per Amit's suggestion, this patch changes the base_common
to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Acked-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

This patch replaces the inten_rise_shift/mask and inten_fall_shift/mask
with intclr_rise_shift/mask and intclr_fall_shift/mask respectively.
Currently, inten_rise_shift/mask and inten_fall_shift/mask bits are only used
to configure intclr related registers.

Description of H/W:
The offset for the bits in the CLEAR register are not consistent across TMU
modules in Exynso5250, 5420 and 5440.

On Exynos5250, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN, INTSTAT registers and at an offset of
12 in INTCLEAR register.

On Exynos5420, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN, INTSTAT and INTCLEAR registers.

On Exynos5440,
the FALL_IRQEN bits are at an offset of 4
and the RISE_IRQEN bits are at an offset of 0
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Acked-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>

Set the return variable to an error code as done elsewhere in the function.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
(
if@p1 (\(ret < 0\|ret != 0\))
 { ... return ret; }
|
ret@p1 = 0
)
... when != ret = e1
    when != &ret
*if(...)
{
  ... when != ret = e2
      when forall
 return ret;
}

// </smpl>
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

The commit d0a0ce3e ("thermal: exynos: Add
missing definations and code cleanup") has removed setting of test MUX address
value at TMU configuration setting.

This field is not present on Exynos4210 and Exynos5 SoCs. However on Exynos4412
SoC it is required to set this field after reset because without it TMU shows
maximal available temperature, which causes immediate platform shutdown.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

Up till now Exynos5250 and Exynos4412 had the same definitions for TMU
data. Following commit changes that, by introducing separate
exynos4412_default_tmu_data structure.

Since Exynos4412 was chronologically first, the corresponding name for
TMU registers and default data was renamed.

Additionally, new SOC_ARCH_EXYNOS4412 type has been defined.

Moreover, the SOC_ARCH_EXYNOS name has been changed to SOC_ARCH_EXYNOS5250.
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Reviewed-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

Commit 1cd1ecb6 ("thermal: exynos: Remove non DT based support")
cleaned up some non-DT code. However, there were few more things
needed for complete cleanup to make this driver DT only.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

The error check is checking for a "base" mapped memory base
instead of "base_common". Fixing the same.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

TMU probe function now checks for a device tree defined regulator.
For compatibility reasons it is allowed to probe driver even without
this regulator defined.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds support for h/w mode calibration in the TMU controller.
Soc's like 5440 support this features. The h/w bits needed for calibration
setting are same as that of enum calibration_type.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch sets the second point trimming value according to the platform
data if the register value is 0.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds configuration data for exynos5440 soc. Also register
definations for the controller are added.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch modifies TMU controller to add changes needed to work with
exynos5440 platform. This sensor registers 3 instance of the tmu controller
with the thermal zone and hence reports 3 temperature output. This controller
supports upto five trip points. For critical threshold the driver uses the
core driver thermal framework for shutdown.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NJungseok Lee <jays.lee@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds support to parse one more common set of TMU register. First
set of register belongs to each instance of TMU and second set belongs to
common TMU registers.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds several features supported by TMU as bitfields.
This features varies across different SOC type and comparing
the features present in the TMU is more logical than comparing
the soc itself.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds support to handle multiple instances of the TMU controllers.
This is done by removing the static structure to register with the core thermal
and creating it dynamically for each instance of the TMU controller. The
interrupt is made shared type to handle shared interrupts. Now since the ISR needs
the core thermal framework to be registered so request_irq is moved after the core
registration is done.
Also the identifier of the TMU controller is extracted from device tree alias. This
will be used for TMU specific initialisation.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

Recently non DT support from Exynos platform is removed and hence
removing non DT support from the driver also. This will help in easy
maintainence.
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This code simplifies the zone handling to use the trip information passed
by the TMU driver and not the hardcoded macros. This also helps in adding
more zone support.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch renames member private_data to driver_data of the thermal
zone registration structure as this item stores the driver related
data and uses it to call the driver related callbacks.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This code modifies the thermal driver to have multiple thermal zone
support by replacing the global thermal zone variable with device data
member of thermal_zone_device.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch uses the TMU status register to know the generated interrupts
and only clear them in the interrupt handler.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

TMU urgently sends active-high signal (thermal trip) to PMU, and thermal
tripping by hardware logic. Thermal tripping means that PMU cuts off the
whole power of SoC by controlling external voltage regulator.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NJonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch migrates the TMU register definition/bitfields to data file. This
is needed to support SoC's which use the same TMU controller but register
validity, offsets or bitfield may slightly vary across SOC's.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds entries min_efuse_value, max_efuse_value, default_temp_offset,
trigger_type, cal_type, trim_first_point, trim_second_point, max_trigger_level
trigger_enable in the TMU platform data structure. Also the driver is modified
to use the data passed by these new platform memebers instead of the constant
macros. All these changes helps in separating the SOC specific data part from
the TMU driver.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>

This patch adds some extra register bitfield definations and cleans
up the code to prepare for moving register macros and definations inside
the TMU data section. In this code cleanup the TMU enable bit is correctly used
as bit0 and bit1 is taken care which is reserve bit.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NJonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Acked-by: NEduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>