1. 29 6月, 2011 3 次提交
  2. 22 6月, 2011 2 次提交
    • S
      powerpc/e500: fix breakage with fsl_rio_mcheck_exception · 82a9a480
      Scott Wood 提交于
      The wrong MCSR bit was being used on e500mc.  MCSR_BUS_RBERR only exists
      on e500v1/v2.  Use MCSR_LD on e500mc, and remove all MCSR checking
      in fsl_rio_mcheck_exception as we now no longer call that function
      if the appropriate bit in MCSR is not set.
      
      If RIO support was enabled at compile-time, but was never probed, just
      return from fsl_rio_mcheck_exception rather than dereference a NULL
      pointer.
      
      TODO: There is still a remaining, though comparitively minor, issue in
      that this recovery mechanism will falsely engage if there's an unrelated
      MCSR_LD event at the same time as a RIO error.
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      82a9a480
    • T
      powerpc/p1022ds: fix audio-related properties in the device tree · f3fed682
      Timur Tabi 提交于
      On the Freescale P1022DS reference board, the SSI audio controller is
      connected in "asynchronous" mode to the codec's clocks, so the device tree
      needs an "fsl,ssi-asynchronous" property.
      
      Also remove the clock-frequency property from the wm8776 node, because
      the clock is enabled only if U-Boot enables it, and U-Boot will set the
      property if the clock is enabled.  A future version of the P1022DS audio
      driver will configure the clock itself, but for now, the driver should
      not be told that the clock is running when it isn't.
      
      Also fix the FIFO depth to 15, instead of 16.
      Signed-off-by: NTimur Tabi <timur@freescale.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      f3fed682
  3. 21 6月, 2011 1 次提交
  4. 20 6月, 2011 4 次提交
  5. 19 6月, 2011 1 次提交
  6. 18 6月, 2011 1 次提交
  7. 17 6月, 2011 1 次提交
    • K
      xen/setup: Fix for incorrect xen_extra_mem_start. · acd049c6
      Konrad Rzeszutek Wilk 提交于
      The earlier attempts (24bdb0b6)
      at fixing this problem caused other problems to surface (PV guests
      with no PCI passthrough would have SWIOTLB turned on - which meant
      64MB of precious contingous DMA32 memory being eaten up per guest).
      The problem was: "on xen we add an extra memory region at the end of
      the e820, and on this particular machine this extra memory region
      would start below 4g and cross over the 4g boundary:
      
      [0xfee01000-0x192655000)
      
      Unfortunately e820_end_of_low_ram_pfn does not expect an
      e820 layout like that so it returns 4g, therefore initial_memory_mapping
      will map [0 - 0x100000000), that is a memory range that includes some
      reserved memory regions."
      
      The memory range was the IOAPIC regions, and with the 1-1 mapping
      turned on, it would map them as RAM, not as MMIO regions. This caused
      the hypervisor to complain. Fortunately this is experienced only under
      the initial domain so we guard for it.
      Acked-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      acd049c6
  8. 16 6月, 2011 7 次提交
  9. 15 6月, 2011 2 次提交
  10. 14 6月, 2011 16 次提交
  11. 13 6月, 2011 1 次提交
  12. 12 6月, 2011 1 次提交