- 19 2月, 2014 1 次提交
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由 Stephen Warren 提交于
This alias entry was evidently cut/paste from a different board, and not correctly updated to match Cardhu. Fix this. Fixes: 553c0a20 ("ARM: tegra: set up /aliases entries for RTCs") Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 20 12月, 2013 1 次提交
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由 Thierry Reding 提交于
Add backlight and panel nodes for the Cardhu 10.1" WXGA TFT LCD panel. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 19 12月, 2013 1 次提交
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由 Stephen Warren 提交于
This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. tegra124-venice2.dts isn't touched yet since we haven't added any off- SoC RTC device to its device tree. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 17 12月, 2013 3 次提交
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由 Laxman Dewangan 提交于
Use Tegra pinconrol dt-binding macro to set the values of different pinmux properties of Tegra30 platforms. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
For Tegra DT files, I've been attempting to keep the nodes sorted in the order: 1) Nodes with reg, in order of reg. 2) Nodes without reg, alphabetically. This patch fixes a few escapees that I missed:-( The diffs look larger than they really are, because sometimes when one node was moved up or down, diff chose to represent this as many other nodes being moved the other way! Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 08 10月, 2013 1 次提交
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由 Wei Ni 提交于
Add vcc-supply property in the nct1008 node, and set it as sys_3v3_reg. change the name of this node to temp-sensor. Signed-off-by: NWei Ni <wni@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 14 8月, 2013 1 次提交
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由 Tuomas Tynkkynen 提交于
Add device tree entries for the 3 USB controllers and PHYs and enable the third controller on Cardhu and Beaver boards. Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. Also, internal pullups need to be enabled on those pins. Signed-off-by: NTuomas Tynkkynen <ttynkkynen@nvidia.com> Tested-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 13 8月, 2013 2 次提交
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由 Jay Agarwal 提交于
Root port 2 is routed to the bottom connector on Cardhu and is used by the development dock to provide gigabit ethernet and USB functionality. Signed-off-by: NJay Agarwal <jagarwal@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
Enabling the LP1 suspend mode for Tegra devices. Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 16 7月, 2013 2 次提交
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由 Stephen Warren 提交于
Nodes should be sorted by reg. Fix location of the tps62361 node. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Wei Ni 提交于
Enable thermal sensor nct1008 for Tegra30 Cardhu. Signed-off-by: NWei Ni <wni@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 5月, 2013 4 次提交
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由 Hiroshi Doyu 提交于
Use the Tegra30 CAR binding header (tegra30-car.h) to replace magic numbers in the device tree. For example, - clocks = <&tegra_car 28>; + clocks = <&tegra_car CLK_HOST1X>; Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com> [swarren, updated since tegra30-car.h moved for consistency] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 05 4月, 2013 3 次提交
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由 Joseph Lo 提交于
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 04 4月, 2013 1 次提交
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由 Joseph Lo 提交于
Adding the bindings of the clock source of PMC in DT. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 3月, 2013 1 次提交
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由 Joseph Lo 提交于
The GPIO pin of SD slot card detection should active low. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 1月, 2013 2 次提交
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由 Stephen Warren 提交于
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Laxman Dewangan 提交于
UARTC is used for the interfacing with bluetooth device. Register this UART channel as high speed serial channel so that it can use the APB DMA for data transfer. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 16 11月, 2012 2 次提交
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由 Laxman Dewangan 提交于
Enable SLINK4 and connected device in Tegra30 based platform Cardhu. Setting maximum spi frequency to 25MHz. SPI serial flash is connected on CS1 of SLINK4 on cardhu platform. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> [swarren: swapped reg/compatible order to be consistent] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Wei Ni 提交于
Configure pinmux as required for WiFi. Enable the SDHCI1 controller for a02 and a04 board, which is connected to the WiFi module. For now, always enable the regulator that provides power to the Wifi module. Signed-off-by: NWei Ni <wni@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 06 11月, 2012 1 次提交
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由 Stephen Warren 提交于
Commit 13511def "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 12 9月, 2012 1 次提交
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由 Stephen Warren 提交于
For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 9月, 2012 3 次提交
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由 Laxman Dewangan 提交于
Cadhu have multiple power rails which are controlled by GPIOs. Add support of these power rail control through fixed regulators. Add entry for all fixed regulators for cardhu-a02 and a04. The details are taken from downstream kernel. Some points on this change are: * Add the tps65910-LDO5 entry and make it always ON to supply power to SDMMC. Once the sd driver support regulator handling, this flag will be remove. * Dropping registration of rail vdd_sdmmc1 as the gpio is used by sdhci power-gpio. This need to fix in sdhci driver and then need to add the registration mechanism. Just removing power-gpio and adding fixed regulator with this gpio is causing the sd access to fail because first probe call of this regulator fails due to non-available of parent and so it calls gpio_free() which disable the pins in gpio mode make pin output to LOW causes power to OFF. In probe retry, it got success and it powered-on but it again need to do again numeration of card here. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Laxman Dewangan 提交于
There is multiple version of cardhu starting from A01 to A07. Cardhu A01 and A03 are not supported. Cardhu A02 will have different sets of GPIOs for fixed regulator compare to cardhu A04. The Cardhu A05, A06, A07 are compatibe with A04. Based on cardhu version, the related dts file need to be chosen like for cardhu A02, use tegra30-cardhu-a02.dts, cardhu A04 and more, use tegra30-cardhu-a04.dts. This patch create the DTS file A02 and A04 and convert tegra30-cardhu.dts as dts include file. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Laxman Dewangan 提交于
Tegra30 based platform "cardhu" have the power management IC TPS65911 for the regulator. Adding DT entry for this device. Data are chosen from downstream kernel and making the voltage output as require by default for device to operate. The default interrupt line is HIGH from PMIC device and so inverting the interrupt detection line of PMU interrupt through configuring PMC. In this patch, do not registering LDO5 because the input supply for this rail is different for different version of cardhu i..e A02 and A04. The registration will be done once the dts file for cardhu A02 and A04 are added in follow on patches. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 21 6月, 2012 1 次提交
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由 Stephen Warren 提交于
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 6月, 2012 1 次提交
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由 Stephen Warren 提交于
The driver supports the new bus-width property, so remove the legacy support-8bit property. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 15 5月, 2012 7 次提交
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由 Arnd Bergmann 提交于
This patch unifies the current DT MMC bindings documentation and code, adds generic MMC DT bindings documentation, and updates .dts files for consistency. [cjb: typo fixes, addition of max-frequency property] Signed-off-by: NChris Ball <cjb@laptop.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stephen Warren 提交于
In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Consistently don't place a space after < or before >. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Cardhu's eMMC controller is on sdhci@78000600, not sdhci@78000400. Fix the typo. This roughly doubles the IO performance, since the support-8bit property actually takes effect. Signed-off-by: NStephen Warren <swarren@nvidia.com> Cc: stable@kernel.org # v3.4
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由 Laxman Dewangan 提交于
Add device info for the core regulator tps62360 in tegra-cardhu dts file. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> [swarren: fixed node name to reflect actual device type] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 04 5月, 2012 1 次提交
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由 Laxman Dewangan 提交于
Add the device info for ALS and proximity sensor for tegra boards cardhu, ventana and seaboard. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> [swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit description] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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