- 19 8月, 2017 4 次提交
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由 Chen-Yu Tsai 提交于
The h8homlet board has the A83T's standard USB 1.1/2.0 host pair routed to a USB host port on the board. The other USB host port is routed to USB OTG controller. Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
The Cubietruck-plus has a GL830 USB-to-SATA bridge connected to EHCI0, and a USB3503 HSIC USB 2.0 hub connected to EHCI1. The USB3503's I2C control interface is not connected. This patch enables both EHCI controllers, adds a device node for the USB hub, and includes sunxi-common-regulators.dtsi for the VBUS regulators. The existing reg_vcc3v3 is dropped as it is also available in the set of common regulators. Other unused regulators are disabled. Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
The USB OTG controller found on the A83T is compatible with the one found on the A33. Add a device node for it. Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
The A83T has 3 USB PHYs, 1 for USB OTG, 1 for standard USB 2.0, 1 for USB HSIC. EHCI0/OHCI0 are the standard USB host pair, while EHCI1 is the host controller for HSIC. OTG is not added yet. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Tested-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 08 8月, 2017 5 次提交
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由 Chen-Yu Tsai 提交于
The AXP813/AXP818 PMICs used with the A83T/H8 SoCs are actually 2 dies in one package sharing the serial bus (I2C/RSB) pins. One die is the actual PMIC. The other is an AC100 codec / RTC combo chip. This patch adds the device nodes for the AC100 chip to the h8homlet-v2 device tree. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
The AXP813/AXP818 PMICs used with the A83T/H8 SoCs are actually 2 dies in one package sharing the serial bus (I2C/RSB) pins. One die is the actual PMIC. The other is an AC100 codec / RTC combo chip. This patch enables the RSB controller and adds a device node for the PMIC die to the h8homlet-v2 device tree. Since the AXP813 and AXP818 are virtually identical, this patch uses the compatible string for the former as a fallback. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
The AXP813/AXP818 PMICs used with the A83T/H8 SoCs are actually 2 dies in one package sharing the serial bus (I2C/RSB) pins. One die is the actual PMIC. The other is an AC100 codec / RTC combo chip. This patch adds the device nodes for the AC100 chip to the Cubietruck Plus device tree. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
The AXP813/AXP818 PMICs used with the A83T/H8 SoCs are actually 2 dies in one package sharing the serial bus (I2C/RSB) pins. One die is the actual PMIC. The other is an AC100 codec / RTC combo chip. This patch enables the RSB controller and adds a device node for the PMIC die to the Cubietruck Plus device tree. Since the AXP813 and AXP818 are virtually identical, this patch uses the compatible string for the former as a fallback. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
The A83T has an RSB controller for talking to the PMIC and audio codec. Add a device node for it. Since there is only one usable pinmux setting, for it, add that as well. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 05 8月, 2017 11 次提交
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由 Chen-Yu Tsai 提交于
The H8 homlet has a micro-SD card slot connected to mmc0, and onboard eMMC from FORESEE, connected to mmc2. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
Now that we support the MMC controllers on the A83T SoC, we can enable them on some boards. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
mmc2 can support 8-bit eMMC chips, with a dedicated reset line. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
The A83T has 3 MMC controllers. The third one is a bit special, as it supports a wider 8-bit bus, and a "new timing mode". Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Marcus Cooper 提交于
The dwmac-sun8i hardware is present on the Beelink X2. It uses the internal PHY. This patch create the needed emac node. Signed-off-by: NMarcus Cooper <codekipper@gmail.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Fixed typo in commit subject] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Marcus Cooper 提交于
This STB has a type A socket which acts as OTG. Signed-off-by: NMarcus Cooper <codekipper@gmail.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Maxime Ripard 提交于
The Bananapi M2-Magic is a board with an A33, a USB host and USB OTG connectors, and 8GB eMMC, an AP6212 WiFi/Bluetooth chip and connectors for DSI, CSI and GPIOs. Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Correct subject prefix case] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Alexander Syring 提交于
The Cubietruck has an AXP209 PMIC with battery connector. This enables the battery power supply subnode. Signed-off-by: NAlexander Syring <alex@asyring.de> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Correct subject prefix order] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
The R_INTC interrupt controller handles the NMI interrupt pin for the SoC. While there is no documentation or code from the vendor for this device on the A83T, existing mainline kernel drivers and bindings show this to be similar to the old Allwinner interrupt controller found on the A10 SoC, but with only the NMI interrupt wired. Register poking experiments confirm this. The device seems to be the same across all recent Allwinner SoCs, apart from the A20 and A80, which have a separate set of registers to handle the NMI interrupt. We already have a set of bindings supporting this on the A31. Add a device node for it, with an SoC specific compatible. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
We introduced a new compatible for the NMI or R_INTC interrupt controller. This new compatible has the register region aligned to the boundary listed in the SoC's memory map. This patch converts the NMI/R_INTC node to using the new compatible, and fixes up the register region and device node name. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chen-Yu Tsai 提交于
We introduced a new compatible for the NMI or R_INTC interrupt controller. This new compatible has the register region aligned to the boundary listed in the SoC's memory map. This patch converts the NMI/R_INTC node to using the new compatible, and fixes up the register region and device node name. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 27 7月, 2017 3 次提交
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由 Chen-Yu Tsai 提交于
Now that the CCU device tree binding headers have been merged, we can use the properly named macros in the device tree, instead of raw numbers. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Corentin Labbe 提交于
The datasheet said that emac register size is 0x10000 not 0x100 Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Fixed commit subject prefix] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Corentin Labbe 提交于
The datasheet said that emac register size is 0x10000 not 0x104 Signed-off-by: NCorentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Fixed commit subject prefix] Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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- 15 7月, 2017 1 次提交
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由 Tobias Klauser 提交于
The arch uses a verbatim copy of the asm-generic version and does not add any own implementations to the header, so use asm-generic/fb.h instead of duplicating code. Link: http://lkml.kernel.org/r/20170517083545.2115-1-tklauser@distanz.chSigned-off-by: NTobias Klauser <tklauser@distanz.ch> Acked-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 14 7月, 2017 5 次提交
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由 Roman Kagan 提交于
Hyper-V identifies vCPUs by Virtual Processor Index, which can be queried via HV_X64_MSR_VP_INDEX msr. It is defined by the spec as a sequential number which can't exceed the maximum number of vCPUs per VM. APIC ids can be sparse and thus aren't a valid replacement for VP indices. Current KVM uses its internal vcpu index as VP_INDEX. However, to make it predictable and persistent across VM migrations, the userspace has to control the value of VP_INDEX. This patch achieves that, by storing vp_index explicitly on vcpu, and allowing HV_X64_MSR_VP_INDEX to be set from the host side. For compatibility it's initialized to KVM vcpu index. Also a few variables are renamed to make clear distinction betweed this Hyper-V vp_index and KVM vcpu_id (== APIC id). Besides, a new capability, KVM_CAP_HYPERV_VP_INDEX, is added to allow the userspace to skip attempting msr writes where unsupported, to avoid spamming error logs. Signed-off-by: NRoman Kagan <rkagan@virtuozzo.com> Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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由 Wanpeng Li 提交于
Adds another flag bit (bit 2) to MSR_KVM_ASYNC_PF_EN. If bit 2 is 1, async page faults are delivered to L1 as #PF vmexits; if bit 2 is 0, kvm_can_do_async_pf returns 0 if in guest mode. This is similar to what svm.c wanted to do all along, but it is only enabled for Linux as L1 hypervisor. Foreign hypervisors must never receive async page faults as vmexits, because they'd probably be very confused about that. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: NWanpeng Li <wanpeng.li@hotmail.com> Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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由 Wanpeng Li 提交于
Add an nested_apf field to vcpu->arch.exception to identify an async page fault, and constructs the expected vm-exit information fields. Force a nested VM exit from nested_vmx_check_exception() if the injected #PF is async page fault. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: NWanpeng Li <wanpeng.li@hotmail.com> Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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由 Wanpeng Li 提交于
This patch adds the L1 guest async page fault #PF vmexit handler, such by L1 similar to ordinary async page fault. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: NWanpeng Li <wanpeng.li@hotmail.com> [Passed insn parameters to kvm_mmu_page_fault().] Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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由 Wanpeng Li 提交于
This patch removes all arguments except the first in kvm_x86_ops->queue_exception since they can extract the arguments from vcpu->arch.exception themselves. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: NWanpeng Li <wanpeng.li@hotmail.com> Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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- 13 7月, 2017 11 次提交
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由 Roman Kagan 提交于
There is a flaw in the Hyper-V SynIC implementation in KVM: when message page or event flags page is enabled by setting the corresponding msr, KVM zeroes it out. This is problematic because on migration the corresponding MSRs are loaded on the destination, so the content of those pages is lost. This went unnoticed so far because the only user of those pages was in-KVM hyperv synic timers, which could continue working despite that zeroing. Newer QEMU uses those pages for Hyper-V VMBus implementation, and zeroing them breaks the migration. Besides, in newer QEMU the content of those pages is fully managed by QEMU, so zeroing them is undesirable even when writing the MSRs from the guest side. To support this new scheme, introduce a new capability, KVM_CAP_HYPERV_SYNIC2, which, when enabled, makes sure that the synic pages aren't zeroed out in KVM. Signed-off-by: NRoman Kagan <rkagan@virtuozzo.com> Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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由 Ladi Prosek 提交于
The backwards_tsc_observed global introduced in commit 16a96021 is never reset to false. If a VM happens to be running while the host is suspended (a common source of the TSC jumping backwards), master clock will never be enabled again for any VM. In contrast, if no VM is running while the host is suspended, master clock is unaffected. This is inconsistent and unnecessarily strict. Let's track the backwards_tsc_observed variable separately and let each VM start with a clean slate. Real world impact: My Windows VMs get slower after my laptop undergoes a suspend/resume cycle. The only way to get the perf back is unloading and reloading the kvm module. Signed-off-by: NLadi Prosek <lprosek@redhat.com> Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
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由 Joe Perches 提交于
Make the code like the rest of the kernel. Link: http://lkml.kernel.org/r/1cd3d401626e51ea0e2333a860e76e80bc560a4c.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Matt Fleming <matt@codeblueprint.co.uk> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Make the code like the rest of the kernel. Link: http://lkml.kernel.org/r/f81bb2a67a97b1fd8b6ea99bd350d8a0f6864fb1.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Rich Felker <dalias@libc.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Make the code like the rest of the kernel. Link: http://lkml.kernel.org/r/756d3fb543e981b9284e756fa27616725a354b28.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Make the code like the rest of the kernel. Link: http://lkml.kernel.org/r/14db9c166d5b68efa77e337cfe49bb9b29bca3f7.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Acked-by: NGreg Ungerer <gerg@linux-m68k.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Make the use of inline like the rest of the kernel. Link: http://lkml.kernel.org/r/f42b2202bd0d4e7ccf79ce5348bb255a035e67bb.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Make the use of inline like the rest of the kernel. Link: http://lkml.kernel.org/r/d47074493af80ce12590340294bc49618165c30d.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Make the use of asmlinkage like the rest of the kernel. Link: http://lkml.kernel.org/r/efb2dfed4d9315bf68ec0334c81b65af176a0174.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: David Howells <dhowells@redhat.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Move inline to be like the rest of the kernel. Link: http://lkml.kernel.org/r/6bf1bec049897c4158f698b866810f47c728f233.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joe Perches 提交于
Convert 'u8 inline' to 'inline u8' to be the same style used by the rest of the kernel. Miscellanea: jornada_ssp_reverse is an odd function. It is declared inline but is also EXPORT_SYMBOL. It is also apparently only used by jornada720_ssp.c Likely the EXPORT_SYMBOL could be removed and the function converted to static. The addition of static and removal of EXPORT_SYMBOL was not done. Link: http://lkml.kernel.org/r/5bd3b2bf39c6c9caf773949f18158f8f5ec08582.1499284835.git.joe@perches.comSigned-off-by: NJoe Perches <joe@perches.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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