1. 02 7月, 2005 5 次提交
    • G
      [PATCH] PCI: clean up dynamic pci id logic · 75865858
      Greg Kroah-Hartman 提交于
      The dynamic pci id logic has been bothering me for a while, and now that
      I started to look into how to move some of this to the driver core, I
      thought it was time to clean it all up.
      
      It ends up making the code smaller, and easier to follow, and fixes a
      few bugs at the same time (dynamic ids were not being matched
      everywhere, and so could be missed on some call paths for new devices,
      semaphore not needed to be grabbed when adding a new id and calling the
      driver core, etc.)
      
      I also renamed the function pci_match_device() to pci_match_id() as
      that's what it really does.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      75865858
    • I
      [PATCH] PCI: pci_assign_unassigned_resources() on x86 · 299de034
      Ivan Kokshaysky 提交于
      - Add sanity check for io[port,mem]_resource in setup-bus.c. These
        resources look like "free" as they have no parents, but obviously
        we must not touch them.
      - In i386.c:pci_allocate_bus_resources(), if a bridge resource cannot be
        allocated for some reason, then clear its flags. This prevents any child
        allocations in this range, so the setup-bus code will work with a clean
        resource sub-tree.
      - i386.c:pcibios_enable_resources() doesn't enable bridges, as it checks
        only resources 0-5, which looks like a clear bug to me. I suspect it
        might break hotplug as well in some cases.
      
      From: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      299de034
    • I
      [PATCH] PCI: handle subtractive decode pci-pci bridge better · 90b54929
      Ivan Kokshaysky 提交于
      With the number of PCI bus resources increased to 8, we can
      handle the subtractive decode PCI-PCI bridge like a normal
      bridge, taking into account standard PCI-PCI bridge windows
      (resources 0-2). This helps to avoid problems with peer-to-peer DMA
      behind such bridges, poor performance for MMIO ranges outside bridge
      windows and prefetchable vs. non-prefetchable memory issues.
      
      To reflect the fact that such bridges do forward all addresses to
      the secondary bus (transparency), remaining bus resources 3-7 are
      linked to resources 0-4 of the primary bus. These resources will be
      used as fallback by resource management code if allocation from
      standard bridge windows fails for some reason.
      Signed-off-by: NIvan Kokshaysky <ink@jurassic.park.msu.ru>
      Acked-by: NDominik Brodowski <linux@dominikbrodowski.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      90b54929
    • R
      [PATCH] PCI: Increase the number of PCI bus resources · a03fa955
      rajesh.shah@intel.com 提交于
      This patch increases the number of resource pointers in the
      pci_bus structure. This is needed to store >4 resource ranges
      for host bridges and transparent PCI bridges. With this change,
      all PCI buses will have more resource pointers, but most PCI
      buses will only use the first 3 or 4, the remaining being NULL.
      The PCI core already deals with this correctly.
      Signed-off-by: NRajesh Shah <rajesh.shah@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      a03fa955
    • G
      [PATCH] PCI: Fix up PCI routing in parent bridge · 26f674ae
      Greg Kroah-Hartman 提交于
      When the cardbus bridge is behind another bridge change the routing
      in the parent bridge for new cards.  This fixes Cardbus on various AMD64
      laptops.
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      26f674ae
  2. 01 7月, 2005 10 次提交
  3. 30 6月, 2005 25 次提交