1. 19 1月, 2018 1 次提交
  2. 02 11月, 2017 1 次提交
    • G
      License cleanup: add SPDX GPL-2.0 license identifier to files with no license · b2441318
      Greg Kroah-Hartman 提交于
      Many source files in the tree are missing licensing information, which
      makes it harder for compliance tools to determine the correct license.
      
      By default all files without license information are under the default
      license of the kernel, which is GPL version 2.
      
      Update the files which contain no license information with the 'GPL-2.0'
      SPDX license identifier.  The SPDX identifier is a legally binding
      shorthand, which can be used instead of the full boiler plate text.
      
      This patch is based on work done by Thomas Gleixner and Kate Stewart and
      Philippe Ombredanne.
      
      How this work was done:
      
      Patches were generated and checked against linux-4.14-rc6 for a subset of
      the use cases:
       - file had no licensing information it it.
       - file was a */uapi/* one with no licensing information in it,
       - file was a */uapi/* one with existing licensing information,
      
      Further patches will be generated in subsequent months to fix up cases
      where non-standard license headers were used, and references to license
      had to be inferred by heuristics based on keywords.
      
      The analysis to determine which SPDX License Identifier to be applied to
      a file was done in a spreadsheet of side by side results from of the
      output of two independent scanners (ScanCode & Windriver) producing SPDX
      tag:value files created by Philippe Ombredanne.  Philippe prepared the
      base worksheet, and did an initial spot review of a few 1000 files.
      
      The 4.13 kernel was the starting point of the analysis with 60,537 files
      assessed.  Kate Stewart did a file by file comparison of the scanner
      results in the spreadsheet to determine which SPDX license identifier(s)
      to be applied to the file. She confirmed any determination that was not
      immediately clear with lawyers working with the Linux Foundation.
      
      Criteria used to select files for SPDX license identifier tagging was:
       - Files considered eligible had to be source code files.
       - Make and config files were included as candidates if they contained >5
         lines of source
       - File already had some variant of a license header in it (even if <5
         lines).
      
      All documentation files were explicitly excluded.
      
      The following heuristics were used to determine which SPDX license
      identifiers to apply.
      
       - when both scanners couldn't find any license traces, file was
         considered to have no license information in it, and the top level
         COPYING file license applied.
      
         For non */uapi/* files that summary was:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|-------
         GPL-2.0                                              11139
      
         and resulted in the first patch in this series.
      
         If that file was a */uapi/* path one, it was "GPL-2.0 WITH
         Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|-------
         GPL-2.0 WITH Linux-syscall-note                        930
      
         and resulted in the second patch in this series.
      
       - if a file had some form of licensing information in it, and was one
         of the */uapi/* ones, it was denoted with the Linux-syscall-note if
         any GPL family license was found in the file or had no licensing in
         it (per prior point).  Results summary:
      
         SPDX license identifier                            # files
         ---------------------------------------------------|------
         GPL-2.0 WITH Linux-syscall-note                       270
         GPL-2.0+ WITH Linux-syscall-note                      169
         ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
         ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
         LGPL-2.1+ WITH Linux-syscall-note                      15
         GPL-1.0+ WITH Linux-syscall-note                       14
         ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
         LGPL-2.0+ WITH Linux-syscall-note                       4
         LGPL-2.1 WITH Linux-syscall-note                        3
         ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
         ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1
      
         and that resulted in the third patch in this series.
      
       - when the two scanners agreed on the detected license(s), that became
         the concluded license(s).
      
       - when there was disagreement between the two scanners (one detected a
         license but the other didn't, or they both detected different
         licenses) a manual inspection of the file occurred.
      
       - In most cases a manual inspection of the information in the file
         resulted in a clear resolution of the license that should apply (and
         which scanner probably needed to revisit its heuristics).
      
       - When it was not immediately clear, the license identifier was
         confirmed with lawyers working with the Linux Foundation.
      
       - If there was any question as to the appropriate license identifier,
         the file was flagged for further research and to be revisited later
         in time.
      
      In total, over 70 hours of logged manual review was done on the
      spreadsheet to determine the SPDX license identifiers to apply to the
      source files by Kate, Philippe, Thomas and, in some cases, confirmation
      by lawyers working with the Linux Foundation.
      
      Kate also obtained a third independent scan of the 4.13 code base from
      FOSSology, and compared selected files where the other two scanners
      disagreed against that SPDX file, to see if there was new insights.  The
      Windriver scanner is based on an older version of FOSSology in part, so
      they are related.
      
      Thomas did random spot checks in about 500 files from the spreadsheets
      for the uapi headers and agreed with SPDX license identifier in the
      files he inspected. For the non-uapi files Thomas did random spot checks
      in about 15000 files.
      
      In initial set of patches against 4.14-rc6, 3 files were found to have
      copy/paste license identifier errors, and have been fixed to reflect the
      correct identifier.
      
      Additionally Philippe spent 10 hours this week doing a detailed manual
      inspection and review of the 12,461 patched files from the initial patch
      version early this week with:
       - a full scancode scan run, collecting the matched texts, detected
         license ids and scores
       - reviewing anything where there was a license detected (about 500+
         files) to ensure that the applied SPDX license was correct
       - reviewing anything where there was no detection but the patch license
         was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
         SPDX license was correct
      
      This produced a worksheet with 20 files needing minor correction.  This
      worksheet was then exported into 3 different .csv files for the
      different types of files to be modified.
      
      These .csv files were then reviewed by Greg.  Thomas wrote a script to
      parse the csv files and add the proper SPDX tag to the file, in the
      format that the file expected.  This script was further refined by Greg
      based on the output to detect more types of files automatically and to
      distinguish between header and source .c files (which need different
      comment types.)  Finally Greg ran the script using the .csv files to
      generate the patches.
      Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org>
      Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b2441318
  3. 26 10月, 2017 1 次提交
    • C
      PCI: Add pci_resize_resource() for resizing BARs · 8bb705e3
      Christian König 提交于
      Add a pci_resize_resource() interface to allow device drivers to resize
      BARs of their devices.
      
      This is useful for devices with large local storage, e.g., graphics
      devices.  These devices often only expose 256MB BARs initially to be
      compatible with 32-bit systems.
      
      This function only tries to reprogram the windows of the bridge directly
      above the requesting device and only the BAR of the same type (usually mem,
      64bit, prefetchable).  This is done to avoid disturbing other drivers by
      changing the BARs of their devices.
      
      Drivers should use the following sequence to resize their BARs:
      1. Disable memory decoding of the device using the PCI cfg dword.
      2. Use pci_release_resource() to release all BARs which can move during the
         resize, including the one you want to resize.
      3. Call pci_resize_resource() for each BAR you want to resize.
      4. Call pci_assign_unassigned_bus_resources() to reassign new locations
         for all BARs which are not resized, but could move.
      5. If everything worked as expected, enable memory decoding in the device
         again using the PCI cfg dword.
      Signed-off-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      8bb705e3
  4. 03 8月, 2017 1 次提交
  5. 19 4月, 2017 1 次提交
  6. 30 11月, 2016 3 次提交
  7. 29 11月, 2016 2 次提交
    • B
      PCI: Update BARs using property bits appropriate for type · 45d004f4
      Bjorn Helgaas 提交于
      The BAR property bits (0-3 for memory BARs, 0-1 for I/O BARs) are supposed
      to be read-only, but we do save them in res->flags and include them when
      updating the BAR.
      
      Mask the I/O property bits with ~PCI_BASE_ADDRESS_IO_MASK (0x3) instead of
      PCI_REGION_FLAG_MASK (0xf) to make it obvious that we can't corrupt bits
      2-3 of I/O addresses.
      
      Use PCI_ROM_ADDRESS_MASK for ROM BARs.  This means we'll only check the top
      21 bits (instead of the 28 bits we used to check) of a ROM BAR to see if
      the update was successful.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      45d004f4
    • B
      PCI: Ignore BAR updates on virtual functions · 63880b23
      Bjorn Helgaas 提交于
      VF BARs are read-only zero, so updating VF BARs will not have any effect.
      See the SR-IOV spec r1.1, sec 3.4.1.11.
      
      We already ignore these updates because of 70675e0b ("PCI: Don't try to
      restore VF BARs"); this merely restructures it slightly to make it easier
      to split updates for standard and SR-IOV BARs.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Reviewed-by: NGavin Shan <gwshan@linux.vnet.ibm.com>
      63880b23
  8. 09 11月, 2016 1 次提交
    • B
      PCI: Don't attempt to claim shadow copies of ROM · 16d917b1
      Bjorn Helgaas 提交于
      If we're using a shadow copy of a PCI device ROM, the shadow copy is in RAM
      and the device never sees accesses to it and doesn't respond to it.  We
      don't have to route the shadow range to the PCI device, and the device
      doesn't have to claim the range.
      
      Previously we treated the shadow copy as though it were the ROM BAR, and we
      failed to claim it because the region wasn't routed to the device:
      
        pci 0000:01:00.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
        pci_bus 0000:01: Allocating resources
        pci 0000:01:00.0: can't claim BAR 6 [mem 0x000c0000-0x000dffff]: no compatible bridge window
      
      The failure path of pcibios_allocate_dev_rom_resource() cleared out the
      resource start address, which also caused the following ioremap() warning:
      
        WARNING: CPU: 0 PID: 116 at /build/linux-akdJXO/linux-4.8.0/arch/x86/mm/ioremap.c:121 __ioremap_caller+0x1ec/0x370
        ioremap on RAM at 0x0000000000000000 - 0x000000000001ffff
      
      Handle an option ROM shadow copy as RAM, without trying to insert it into
      the iomem resource tree.
      
      This fixes a regression caused by 0c0e0736 ("PCI: Set ROM shadow
      location in arch code, not in PCI core"), which appeared in v4.6.  The
      regression causes video device initialization to fail.  This was reported
      on AMD Turks, but it likely affects others as well.
      
      Fixes: 0c0e0736 ("PCI: Set ROM shadow location in arch code, not in PCI core")
      Reported-and-tested-by: NVecu Bosseur <vecu.bosseur@gmail.com>
      Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1627496
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=175391
      Link: https://bugzilla.redhat.com/show_bug.cgi?id=1352272Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: stable@vger.kernel.org	# v4.6+
      16d917b1
  9. 09 3月, 2016 1 次提交
  10. 24 9月, 2015 1 次提交
    • B
      PCI: Clear IORESOURCE_UNSET when reverting to firmware-assigned address · 0b26cd69
      Bjorn Helgaas 提交于
      If pci_assign_resource() fails to assign space for a BAR, we may restore
      the BAR to whatever firmware left there at boot-time (this depends on
      whether the arch implements pcibios_retrieve_fw_addr()).  The messages we
      print are not as useful as they could be:
      
        pci 0000:00:01.0: BAR 15: assigned [mem 0xc0000000-0xc01fffff 64bit pref]
        pci 0000:01:00.0: BAR 0: no space for [mem size 0x10000000 pref]
        pci 0000:01:00.0: BAR 0: trying firmware assignment [mem size 0x10000000 pref]
        pci 0000:01:00.0: BAR 0: [mem size 0x10000000 pref] conflicts with PCI Bus 0000:00 [mem 0xc0000000-0xffffffff window]
      
      The last two lines should contain the actual BAR address, not the size.
      Clear IORESOURCE_UNSET so we print the address.  If requesting the
      firmware-assigned resource fails, mark it IORESOURCE_UNSET again.
      
      This is a cosmetic change to clarify the message: previously, if
      pci_revert_fw_address() succeeded, pci_assign_resource() cleared
      IORESOURCE_UNSET anyway, so this isn't really a functional change.
      
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=85491#c50Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      0b26cd69
  11. 14 9月, 2015 1 次提交
  12. 13 3月, 2015 1 次提交
  13. 09 7月, 2014 3 次提交
  14. 04 7月, 2014 1 次提交
    • G
      PCI: Keep original resource if we fail to expand it · c3337708
      Guo Chao 提交于
      If we have space assigned to a resource, we try to expand the resource
      (e.g., to accommodate SR-IOV resources), and the expansion attempt fails,
      we should keep the original assignment.
      
      After bd064f0a ("PCI: Mark resources as IORESOURCE_UNSET if we can't
      assign them"), we left the resource marked IORESOURCE_UNSET when the
      expansion failed, even if it had originally been set.  That caused errors
      like this:
      
        pci 0003:00:00.0: can't enable device: BAR 15 [mem size 0x0c000000 64bit pref] not assigned
        pci 0003:00:00.0: Error enabling bridge (-22), continuing
      
      Fix this by restoring the original flags when reassignment fails.
      
      [bhelgaas: reworked to simplify, changelog]
      Fixes: bd064f0a ("PCI: Mark resources as IORESOURCE_UNSET if we can't assign them")
      Signed-off-by: NGuo Chao <yan@linux.vnet.ibm.com>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      CC: stable@vger.kernel.org	# v3.15+
      c3337708
  15. 11 6月, 2014 2 次提交
  16. 24 5月, 2014 3 次提交
    • B
      PCI: Add resource allocation comments · 67d29b5c
      Bjorn Helgaas 提交于
      Add comments in the code to match the allocation strategy of 7c671426dfc3
      ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources").
      
      No functional change.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      67d29b5c
    • B
      PCI: Simplify __pci_assign_resource() coding style · d3689df0
      Bjorn Helgaas 提交于
      If an allocation succeeds, we can return success immediately.  Then we
      don't have to test for success in the subsequent code.
      
      No functional change.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      d3689df0
    • Y
      PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources · 5b285415
      Yinghai Lu 提交于
      This patch changes the way we handle 64-bit prefetchable bridge windows to
      make it more likely that we can assign space to all devices.
      
      Previously we put all prefetchable resources in the prefetchable bridge
      window.  If any of those resources was 32-bit only, we restricted the
      window to be below 4GB.
      
      After this patch, we only put 64-bit prefetchable resources in a 64-bit
      prefetchable window.  We put all 32-bit prefetchable resources in the
      non-prefetchable window, even if there are no 64-bit prefetchable
      resources.
      
      With the previous approach, if there was a 32-bit prefetchable resource
      behind a bridge, we forced the bridge's prefetchable window below 4GB,
      which meant that even if there was plenty of space above 4GB available, we
      couldn't use it, and assignment of large 64-bit resources could fail, as
      in the bugzilla below.
      
      The new strategy is:
      
        1) If the prefetchable window is 64 bits wide, we put only 64-bit
           prefetchable resources in it.  Any 32-bit prefetchable resources go in
           the non-prefetchable window.
      
        2) If the prefetchable window is 32 bits wide, we put both 32- and 64-bit
           prefetchable resources in it.
      
        3) If there is no prefetchable window, all MMIO resources go in the
           non-prefetchable window.
      
      This reduces performance for 32-bit prefetchable resources below a bridge
      with a 64-bit prefetchable window.  We previously assigned prefetchable
      space, but now we'll assign non-prefetchable space.  This is the case even
      if there are no 64-bit prefetchable resources, or if they would all fit
      below 4GB.  In those cases, the old strategy would work and would have
      better performance.
      
      [bhelgaas: write changelog, add bugzilla link, fold in mem64_mask removal]
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=74151Tested-by: NGuo Chao <yan@linux.vnet.ibm.com>
      Tested-by: NWei Yang <weiyang@linux.vnet.ibm.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      5b285415
  17. 15 4月, 2014 1 次提交
  18. 20 3月, 2014 1 次提交
    • B
      PCI: Don't enable decoding if BAR hasn't been assigned an address · 3cedcc36
      Bjorn Helgaas 提交于
      Don't enable memory or I/O decoding if we haven't assigned or claimed the
      BAR's resource.
      
      If we enable decoding for a BAR that hasn't been assigned an address, we'll
      likely cause bus conflicts.  This declines to enable decoding for resources
      with IORESOURCE_UNSET.
      
      Note that drivers can use pci_enable_device_io() or pci_enable_device_mem()
      if they only care about specific types of BARs.  In that case, we don't
      bother checking whether the corresponding resources are assigned or
      claimed.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      3cedcc36
  19. 28 2月, 2014 4 次提交
  20. 22 12月, 2013 1 次提交
    • Y
      PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev · fc279850
      Yinghai Lu 提交于
      These interfaces:
      
        pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource)
        pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region)
      
      took a pci_dev, but they really depend only on the pci_bus.  And we want to
      use them in resource allocation paths where we have the bus but not a
      device, so this patch converts them to take the pci_bus instead of the
      pci_dev:
      
        pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource)
        pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region)
      
      In fact, with standard PCI-PCI bridges, they only depend on the host
      bridge, because that's the only place address translation occurs, but
      we aren't going that far yet.
      
      [bhelgaas: changelog]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      fc279850
  21. 15 11月, 2013 1 次提交
  22. 16 4月, 2013 1 次提交
  23. 12 7月, 2012 2 次提交
  24. 10 7月, 2012 1 次提交
    • B
      PCI: disable MEM decoding while updating 64-bit MEM BARs · 9aac537e
      Bjorn Helgaas 提交于
      When we update 64-bit BARs, we have to perform two config writes.  Between
      the writes, the half-written BAR value could match a MEM access intended
      for another device.  This could result in corruption of this device (for
      writes) or an unexpected response machine check (for reads).
      
      To prevent this, disable MEM decoding while updating such BARs.  This uses
      the same safety test as 253d2e54, which disables both MEM and IO while
      sizing BARs, namely, we don't disable decoding for host bridge devices.
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      9aac537e
  25. 25 2月, 2012 1 次提交
  26. 15 2月, 2012 3 次提交
    • Y
      PCI: Move pdev_sort_resources() to setup-bus.c · 78c3b329
      Yinghai Lu 提交于
      This allows us to move the definition of struct resource_list to
      setup_bus.c and later convert resource_list to a regular list.
      Suggested-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      78c3b329
    • Y
      PCI : Calculate right add_size · a4ac9fea
      Yinghai Lu 提交于
      During debug of one SRIOV enabled hotplug device, we found found that
      add_size is not passed properly.
      
      The device has devices under two level bridges:
      
       +-[0000:80]-+-00.0-[81-8f]--
       |           +-01.0-[90-9f]--
       |           +-02.0-[a0-af]----00.0-[a1-a3]--+-02.0-[a2]--+-00.0  Oracle Corporation Device
       |           |                               \-03.0-[a3]--+-00.0  Oracle Corporation Device
      
      Which means later the parent bridge will not try to add a big enough range:
      
      [  557.455077] pci 0000:a0:00.0: BAR 14: assigned [mem 0xf9000000-0xf93fffff]
      [  557.461974] pci 0000:a0:00.0: BAR 15: assigned [mem 0xf6000000-0xf61fffff pref]
      [  557.469340] pci 0000:a1:02.0: BAR 14: assigned [mem 0xf9000000-0xf91fffff]
      [  557.476231] pci 0000:a1:02.0: BAR 15: assigned [mem 0xf6000000-0xf60fffff pref]
      [  557.483582] pci 0000:a1:03.0: BAR 14: assigned [mem 0xf9200000-0xf93fffff]
      [  557.490468] pci 0000:a1:03.0: BAR 15: assigned [mem 0xf6100000-0xf61fffff pref]
      [  557.497833] pci 0000:a1:03.0: BAR 14: can't assign mem (size 0x200000)
      [  557.504378] pci 0000:a1:03.0: failed to add optional resources res=[mem 0xf9200000-0xf93fffff]
      [  557.513026] pci 0000:a1:02.0: BAR 14: can't assign mem (size 0x200000)
      [  557.519578] pci 0000:a1:02.0: failed to add optional resources res=[mem 0xf9000000-0xf91fffff]
      
      It turns out we did not calculate size1 properly.
      
      static resource_size_t calculate_memsize(resource_size_t size,
                      resource_size_t min_size,
                      resource_size_t size1,
                      resource_size_t old_size,
                      resource_size_t align)
      {
              if (size < min_size)
                      size = min_size;
              if (old_size == 1 )
                      old_size = 0;
              if (size < old_size)
                      size = old_size;
              size = ALIGN(size + size1, align);
              return size;
      }
      
      We should not pass add_size with min_size in calculate_memsize since
      that will make add_size not contribute final add_size.
      
      So just pass add_size with size1 to calculate_memsize().
      
      With this change, we should have chance to remove extra addon in
      pci_reassign_resource.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      a4ac9fea
    • M
      PCI: Fix typo in setup-res.c · 0dea210b
      Masanari Iida 提交于
      Correct spelling "resouce" to "resource" in
      dricers/pci/setup-res.c
      Signed-off-by: NMasanari Iida <standby24x7@gmail.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      0dea210b