1. 09 11月, 2017 1 次提交
  2. 24 8月, 2017 1 次提交
    • H
      arm64: dts: marvell: add Device Tree files for Armada-8KP · bf32f2ae
      Hanna Hawa 提交于
      This commit adds the base Device Tree files for the Armada 8KPlus.
      The Armada 8KP SoCs include several hardware blocks, and this
      commit only adds support for the AP810 block, that contains the CPU
      core and basic peripherals.
      
      AP810 is a high-performance die, includes octal core application
      processor based ARMv8-A architecture, two standard high speed DDR4
      interface, and GIC-600 interrupt controller.
      AP810 Built as part of Marvell’s MoChi AP family products.
      
      Armada-8080 (8KPlus family), include an AP810 block that contains
      the CPU core and basic peripherals.
      
      This commit creates the following hierarchy:
       * armada-ap810-ap0.dtsi - definitions common to AP810
       	* armada-ap810-ap0-octa-core.dtsi - description of the octa cores
      		* armada-8080.dtsi - description of the 8080 SoC
      			* armada-8080-db.dts - description of the 8080 board
      Signed-off-by: NHanna Hawa <hannah@marvell.com>
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      bf32f2ae
  3. 20 1月, 2017 1 次提交
  4. 17 10月, 2016 1 次提交
  5. 08 8月, 2016 1 次提交
  6. 26 2月, 2016 1 次提交
    • T
      arm64: dts: marvell: add Device Tree files for Armada 7K/8K · ec7e5a56
      Thomas Petazzoni 提交于
      This commit adds the base Device Tree files for the Armada 7K and 8K
      SoCs, as well as the Armada 8040 DB board.
      
      The Armada 7020, 7040 (7K family) and 8020, 8040 (8K family) are
      composed of:
      
       - An AP806 block that contains the CPU core and a few basic
         peripherals. The AP806 is available in dual core configurations
         (used in 7020 and 8020) and quad core configurations (used in 8020
         and 8040).
      
       - One or two CP110 blocks that contain all the high-speed interfaces
         (SATA, PCIe, Ethernet, etc.). The 7K family chips have one CP110,
         and the 8K family chips have two CP110, giving them twice the
         number of HW interfaces.
      
      In order to represent this from a Device Tree point of view, this
      commit creates the following hierarchy:
      
       * armada-ap806.dtsi - definitions common to dual/quad ap806
         * armada-ap806-dual.dtsi - description of the two CPUs
           * armada-7020.dtsi - description of the 7020 SoC
           * armada-8020.dtsi - description of the 8020 SoC
         * armada-ap806-quad.dtsi - description of the four CPUs
           * armada-7040.dtsi - description of the 7040 SoC
             * armada-7040-db.dts - description of the 7040 board
           * armada-8040.dtsi - description of the 8040 SoC
      
      The CP110 blocks are not described yet, and will be part of future
      patch series.
      
      [gregory.clement@free-electrons.com: Fix commit title by adding ' dts:']
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
      ec7e5a56
  7. 17 2月, 2016 1 次提交
  8. 21 9月, 2015 1 次提交
  9. 04 8月, 2015 1 次提交
  10. 24 7月, 2015 1 次提交
  11. 26 1月, 2015 1 次提交
  12. 22 10月, 2014 1 次提交