- 09 11月, 2017 1 次提交
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由 Masahiro Yamada 提交于
We need to add "clean-files" in Makfiles to clean up DT blobs, but we often miss to do so. Since there are no source files that end with .dtb or .dtb.S, so we can clean-up those files from the top-level Makefile. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRob Herring <robh@kernel.org>
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- 31 8月, 2017 3 次提交
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由 Minghuan Lian 提交于
LS1046a includes 3 MSI controllers. Each controller supports 128 interrupts. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Minghuan Lian 提交于
In order to maximize the use of MSI, a PCIe controller will share all MSI controllers. The patch changes "msi-parent" to refer to all MSI controller dts nodes. Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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由 Minghuan Lian 提交于
"1" should be replaced by "l". This is a typo. The patch is to fix it. Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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- 14 8月, 2017 3 次提交
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由 Ashish Kumar 提交于
Signed-off-by: NAshish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yuantian Tang 提交于
ls208xa supports another cpu idle state which is pw20 which saves more power when cpu is idle. It was implemented through psci firmware. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yuantian Tang 提交于
ls1088a supports another cpu idle state which is ph20 which saves more power when cpu is idle. It was implemented through psci firmware. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 05 8月, 2017 3 次提交
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由 Horia Geantă 提交于
LS1088A has a SEC v5.3 security engine. Signed-off-by: NHoria Geantă <horia.geanta@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Horia Geantă 提交于
LS208xA has a SEC v5.1 security engine. Signed-off-by: NHoria Geantă <horia.geanta@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Horia Geantă 提交于
aliases node is identical for all boards, thus move it to the common file ls208xa.dtsi. Signed-off-by: NHoria Geantă <horia.geanta@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 25 7月, 2017 1 次提交
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由 Ran Wang 提交于
LS1012A has one USB 3.0(DWC3) controller and one USB 2.0 controller. Signed-off-by: NRan Wang <ran.wang_1@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 14 6月, 2017 1 次提交
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由 Yuantian Tang 提交于
1. Remove ls1043a compatible string from node 2. Fix the sata ecc register address error Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 05 6月, 2017 3 次提交
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由 Scott Wood 提交于
ls1012a has separate input root clocks for core PLLs versus the platform PLL, with the latter described as sysclk in the hw docs. Accordingly, update the clock-frequency in sysclk to 125M as platform input clock. Signed-off-by: NScott Wood <oss@buserror.net> Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Ran Wang 提交于
Add "dis_rxdet_inp3_quirk" boolean property to USB3 node. This property is used to disable rx detection in P3 PHY mode. Signed-off-by: NRan Wang <ran.wang_1@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 yinbo.zhu 提交于
Currently SD UHS-I modes were enabled by default on LS208xARDB boards, but the new LS2088ARDB RevF board didn't support them any more since SDHC circuit had been reworked. This patch is to disable SD UHS-I modes by default in case of any issue on LS2088ARDB RevF Signed-off-by: Nyinbo.zhu <yinbo.zhu@nxp.com> Acked-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 25 5月, 2017 1 次提交
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由 Javier Martinez Canillas 提交于
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 21 5月, 2017 3 次提交
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由 Madalin Bucur 提交于
Add the DPAA 1.x FMan device tree nodes for LS1046A boards. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Madalin Bucur 提交于
Add the DPAA 1.x FMan device tree nodes for LS1043A boards. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Madalin Bucur 提交于
Add the DPAA 1.x FMan nodes for the ARM based platforms. Using separate files for each port as not all ports are used on all devices. Different numbering of ports is also possible on different devices. Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 16 5月, 2017 3 次提交
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由 Madalin Bucur 提交于
Add the QBMan device tree nodes for LS1046A devices. Signed-off-by: NRoy Pledge <roy.pledge@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Madalin Bucur 提交于
Add the DPAA 1.x QMan and BMan nodes in the LS1043A device tree. Signed-off-by: NRoy Pledge <roy.pledge@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Madalin Bucur 提交于
Add the DPAA 1.x DPAA QMan and BMan portal nodes. Signed-off-by: NRoy Pledge <roy.pledge@nxp.com> Signed-off-by: NMadalin Bucur <madalin.bucur@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 15 5月, 2017 9 次提交
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由 Yuantian Tang 提交于
Add nodes and properties for thermal management support. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yuantian Tang 提交于
1. Sata ecc should be disabled due to a erratum. Provide the ecc register address for driver to use. 2. Enable dma coherence operation Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Prabhakar Kushwaha 提交于
LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC. So add flash information in ifc node of device tree. Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yangbo Lu 提交于
Add esdhc node for ls1088a and enable it on both RDB and QDS boards. Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yangbo Lu 提交于
There are two eSDHC controllers in LS1012A. This patch is to add eSDHC nodes for ls1012a dts. Also enable eSDHC for RDB/QDS boards. Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yangbo Lu 提交于
This patch is to enable SD UHS-I mode on LS208xRDB and eMMC HS200 mode on LS208xQDS in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes. Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Yangbo Lu 提交于
This patch is to enable SD UHS-I mode and eMMC HS200 mode on LS1046ARDB in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes. Signed-off-by: NYangbo Lu <yangbo.lu@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Prabhakar Kushwaha 提交于
Integrated flash controller present in LS1043A and LS1046A is big endian. So add big endian property in the devive tree. Signed-off-by: NPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Li Yang 提交于
Update the copyright claims to comply with company policy. Signed-off-by: NLi Yang <leoyang.li@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 29 3月, 2017 2 次提交
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由 Harninder Rai 提交于
LS1088A contains eight ARM v8 CortexA53 processor cores with 32 KB L1-D cache and 32 KB L1-I cache Features summary Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs - Arranged as two clusters of four cores sharing a 1 MB L2 cache - Speed Up to 1.5 GHz - Support for cluster power-gating. Cache coherent interconnect (CCI-400) - Hardware-managed data coherency - Up to 700 MHz One 64-bit DDR4 SDRAM memory controller with ECC Data path acceleration architecture 2.0 (DPAA2) Three PCIe 3.0 controllers One serial ATA (SATA 3.0) controller Three high-speed USB 3.0 controllers with integrated PHY Following levels of DTSI/DTS files have been created for the LS1088A SoC family: - fsl-ls1088a.dtsi: DTS-Include file for NXP LS1088A SoC. - fsl-ls1088a-qds.dts: DTS file for NXP LS1088A QDS board. - fsl-ls1088a-rdb.dts: DTS file for NXP LS1088A RDB board Signed-off-by: NHarninder Rai <harninder.rai@nxp.com> Signed-off-by: NAshish Kumar <ashish.kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>` Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Horia Geantă 提交于
LS1012A has a SEC v5.4 security engine. Signed-off-by: NHoria Geantă <horia.geanta@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 16 3月, 2017 1 次提交
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由 Yuantian Tang 提交于
There is a thermal monitoring unit on ls1012a soc which can monitor and record the temperature of cores so that appropriate actions can be taken or alarm the user when the temperature exceeds a programmed temperature threshold. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 14 3月, 2017 1 次提交
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由 Yuantian Tang 提交于
Updated sata node to add ecc register address and dma coherence property. Enable sata on ls1012a platforms as well. Signed-off-by: NTang Yuantian <andy.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 08 3月, 2017 2 次提交
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由 Tang Yuantian 提交于
For ls1046 sata, ecc should be disabled due to a erratum. Provide the ecc register address for driver to use. Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Tang Yuantian 提交于
For ls1043 sata, ecc should be disabled due to a erratum. Provide the ecc register address for driver to use. Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 07 3月, 2017 2 次提交
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由 Abhimanyu Saini 提交于
This patch adds the device tree support for FSL LS2088A SoC based on ARMv8 architecture. Following levels of DTSI/DTS files have been created for the LS2088A SoC family: - fsl-ls2088a.dtsi: DTS-Include file for FSL LS2088A SoC. - fsl-ls2088a-qds.dts: DTS file for FSL LS2088A QDS board. - fsl-ls2088a-rdb.dts: DTS file for FSL LS2088A RDB board. Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NAshish Kumar <ashish.kumar@nxp.com> Signed-off-by: NAbhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abhimanyu Saini 提交于
LS2088A and LS2080A are similar SoCs with a few differences like ARM cores etc. Reorganize the LS2080A device tree to move the common nodes to: - fsl-ls208xa.dtsi - fsl-ls208xa-rdb.dtsi - fsl-ls208xa-qds.dtsi Signed-off-by: NPriyanka Jain <priyanka.jain@nxp.com> Signed-off-by: NAshish Kumar <ashish.kumar@nxp.com> Signed-off-by: NAbhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 10 1月, 2017 1 次提交
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由 Jia Hongtao 提交于
Also add nodes and properties for thermal management support. Signed-off-by: NJia Hongtao <hongtao.jia@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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