We need to add "clean-files" in Makfiles to clean up DT blobs, but we
often miss to do so.

Since there are no source files that end with .dtb or .dtb.S, so we
can clean-up those files from the top-level Makefile.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NRob Herring <robh@kernel.org>

This patch adds Broadcom SBA-RAID DT nodes for Stingray SoC.

The Stingray SoC has total 32 SBA-RAID FlexRM rings and it has
8 CPUs so we create 8 SBA-RAID instances (one for each CPU).
This way Linux DMAENGINE will have one SBA-RAID DMA device for
each CPU.
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

We have two instances of FlexRM on Stingray. One for SBA RAID
offload engine and another for SPU2 Crypto offload engine.

This patch adds FlexRM mailbox controller DT nodes for Stingray.
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Signed-off-by: NRaveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Add DT nodes for SATA host controllers and SATA PHYs
on Stingray SoC
Signed-off-by: NSrinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch adds DT node to enable BGMAC driver on Stingray
Signed-off-by: NAbhishek Shah <abhishek.shah@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NOza Oza <oza.oza@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

We have 8 instances of sp804 in Stingray SoC. Let's enable
it in Stingray DT.
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Reviewed-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Added MDIO multiplexer iproc DT node for Stingray, which contains
the child nodes of PCIe serdes, RGMII, SATA and USB phy MDIO slaves.
Signed-off-by: NSrinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch enables stats for CCN-502 interconnect on Stingray.
Signed-off-by: NVelibor Markovski <velibor.markovski@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

BCM2837 is somewhat unusual in that we build its DT on both arm32 and
arm64.  Most devices are being run in arm32 mode.

Having the body of the DT for 2837 separate from 2835/6 has been a
source of pain, as we often need to make changes that span both
directories simultaneously (for example, the thermal changes for 4.13,
or anything that changes the name of a node referenced by '&' from
board files).  Other changes are made more complicated than they need
to be, such as the SDHOST enabling, because we have to split a single
logical change into a 283[56] half and a 2837 half.

To fix this, make the stub board include file live in arm64 instead of
arm32, and keep all of BCM283x's contents in arm32.  From here on, our
changes to DT contents can be submitted through a single tree.
Signed-off-by: NEric Anholt <eric@anholt.net>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Place northstar2 into its own subdirectory.  This helps as the number
of Broadcom boards grow and we can separate them per SoC.
Signed-off-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch adds device tree node for USB Dual Role Device PHY for
Broadcom's Northstar2 SoC.
Signed-off-by: NRaviteja Garimella <raviteja.garimella@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This defines the bcm2837 SoC specific thermal coefficients in
order to initialize the thermal driver correctly.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NEric Anholt <eric@anholt.net>
Acked-by: NEduardo Valentin <edubezval@gmail.com>

The Stingray SoC has two instances of SDHCI controller
and one instance of iProc PWM.

Let's enable above mentioned devices in Stingray DT.
Signed-off-by: NSrinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

We have two instance of PL022 SPI controllers, one instance of
DMA PL330, and one non-secure SP805 Watchdog on Stingray SOC.

This patch adds DT nodes for the above mentioned devices in
Stingray DT.
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Reviewed-by: NPramod KUMAR <pramod.kumar@broadcom.com>
Reviewed-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch adds I2C DT nodes on Stingray SoC.
Signed-off-by: NOza Pawandeep <oza.oza@broadcom.com>
Reviewed-by: NVikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

The GPIOs on Stingray SOC are based on iProc GPIOs hence
using this we add GPIO DT nodes for Stingray SOC.
Signed-off-by: NPramod Kumar <pramodku@broadcom.com>
Reviewed-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.

For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.
Signed-off-by: NPramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NVikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch adds NAND controller DT Node and NAND chip DT
node for Stingray SOC and Stingray reference boards.
Signed-off-by: NPramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: NAbhishek Shah <abhishek.shah@broadcom.com>
Reviewed-by: NVikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch describes Stingray SOC clock tree using
DT nodes in Stingray DTS.
Signed-off-by: NSandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

The Broadcom Stingray SoC is a new member in Broadcom iProc
SoC family.

This patch adds initial DTS files for Broadcom Stingray SoC
and two of its reference boards (bcm958742k and bcm958742t).

We have lot of reference boards and large number of devices
in Broadcom Stingray SoC so eventually we will have quite
a few DTS files for Stingray. To tackle, we have added a
separate directory for Stingray DTS files.
Signed-off-by: NAnup Patel <anup.patel@broadcom.com>
Signed-off-by: NScott Branden <scott.branden@broadcom.com>
Reviewed-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

For the raspberry pi 3 we'll need both sdhci (handles sdio wifi) and
sdhost (handles sdcard).
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
Acked-by: NEric Anholt <eric@anholt.net>

Move and update device tree files as part of transition from Broadcom
Vulcan to Cavium ThunderX2.

The changes are to:
 * rename dts/broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi,
   update cpu cores to be "cavium,thunder2", and update SoC to be
   "cavium,thunderx2-cn9900"
 * move SoC dts/broadcom/vulcan-eval.dtsi to cavium/thunder2-99xx.dtsi
   and update board name string
 * Update dts/broadcom/Makefile not to build vulcan dtbs
 * Update dts/cavium/Makefile to build thunder2 dtbs

No changes to the dts contents except the updated "compatible" and
"model" properties.
Signed-off-by: NJayachandran C <jnair@caviumnetworks.com>
Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Cache related issues with DMA rings and performance issues related to
caching are being caused by not properly setting the "dma-coherent" flag
in the device tree entries.  Adding it here to correct the issue.
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Fixes: fd5e5dd5 ("arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2")
Fixes: dddc3c9d ("arm64: dts: NS2: add AMAC ethernet support")
Fixes: e7924914 ("arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver")
Fixes: ac9aae00 ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2")
Fixes: efc87767 ("arm64: dts: Add SDHCI DT node for NS2")
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Per e-mail from Sergei Shtylyov, the DT spec dictates it should be
"okay" (although "ok" is also recognized).  Thus, changing all "ok" to
"okay" in NS2 device tree files
Suggested-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Add Northstar2 device tree entry for Broadcom Secure Processing Unit
(SPU) crypto hardware.
Signed-off-by: NSteve Lin <steven.lin1@broadcom.com>
Signed-off-by: NRob Rice <rob.rice@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

The BCM958712DxXMC board is a smaller form factor typically used as
controller boards for switches.  This smaller board has less devices
pinned out, so only a few need be populated in the device tree.
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Nitro firmware is loaded into memory by the bootloader at a specific
location.  Set this memory range aside to prevent the kernel from using
it.
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This enables the PAXC based PCIe root complex on NS2 SVK. The PAXC based
root complex is connected to internally emulated PCIe endpoints
Signed-off-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

PAXB and PAXC PCIe interfaces on NS2 have been using the iProc event
queue to handle MSI. With the gicv2m support ready, we should now switch
to gicv2m for MSI handling
Signed-off-by: NRay Jui <ray.jui@broadcom.com>
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

PCI PHYs are missing from the Northstar2 DT entries for the 2 PCI buses.
Add them so that PCI devices can be discovered.
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Enable sdio1 in the Northstar2 SVK device tree file
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

We are incorrectly defining the pwr LED, attaching it to a gpio line
that is wired to the Wi-Fi SDIO module (which fails due to this).

The actual power LED is connected to the GPIO expander, which we don't
expose currently.

Fixes: 9d56c22a ("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.")
Thanks-to: Eric Anholt <eric@anholt.net> [for clarifying we can't control the LED]
Signed-off-by: NAndrea Merello <andrea.merello@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

Add the node for the thermal sensor of the bcm2837-soc
to the device tree.
Signed-off-by: NMartin Sperl <kernel@martin.sperl.org>
Signed-off-by: NEric Anholt <eric@anholt.net>

Add support for the AMAC ethernet to the Broadcom Northstar2 SoC device
tree
Signed-off-by: NJon Mason <jon.mason@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add Broadcom Northstar2 SoC device tree entries for PDC driver.
Signed-off-by: NRob Rice <rob.rice@broadcom.com>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

bcm2837-rpi-3-b.dts, its only in-tree user, was overriding it as
"brcm,bcm2837" already.

Fixes: 9d56c22a ("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.")
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NEric Anholt <eric@anholt.net>

This patch adds NAND DT properties for NS2 SVK to configure the bus
width width and OOB sector size
Signed-off-by: NPrafulla Kota <prafulla.kota@broadcom.com>
Signed-off-by: NRay Jui <ray.jui@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

With the "mmu-masters" property now deprecated and optional, the
generic binding offers a more efficient way to specify no masters.

CC: Ray Jui <rjui@broadcom.com>
CC: Scott Branden <sbranden@broadcom.com>
CC: Jon Mason <jonmason@broadcom.com>
Signed-off-by: NRobin Murphy <robin.murphy@arm.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

This patch adds NAND DT properties for NS2 SVK to configure the bus
width width and OOB sector size
Signed-off-by: NPrafulla Kota <prafulla.kota@broadcom.com>
Signed-off-by: NRay Jui <ray.jui@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>

Adding QSPI node compatible with the new spi-bcm-qspi driver for the Broadcom's
Northstar2 SoC.
Signed-off-by: NKamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: NYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>