- 16 5月, 2018 1 次提交
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由 Biju Das 提交于
Add PFC support for the R8A77470 SoC including pin groups for some on-chip devices such as SCIF and MMC. Signed-off-by: NBiju Das <biju.das@bp.renesas.com> Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 09 3月, 2018 1 次提交
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由 Sergei Shtylyov 提交于
Add the PFC support for the R8A77980 SoC including pin groups for some on-chip devices such as AVB, CAN-FD, GETHER, [H]SCIF, I2C, INTC-EX, MMC, MSIOF, PWM, and VIN... Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: NVladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 21 2月, 2018 1 次提交
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由 Jacopo Mondi 提交于
Add initial PFC support for R-Car M3-N (r8a77965) SoC. No groups or functions defined, just pin and registers enumeration. Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 05 12月, 2017 1 次提交
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由 Sergei Shtylyov 提交于
Add the PFC support for the R8A77970 SoC including pin groups for some on-chip devices such as CAN-FD, [H]SCIF, I2C, INTC-EX, MMC, MSIOF, PWM, VIN... Based on the original (and large) patch by Daisuke Matsushita <daisuke.matsushita.ns@hitachi.com>. Signed-off-by: NVladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NRob Herring <robh@kernel.org> [geert: Drop EtherAVB for now] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 20 10月, 2017 5 次提交
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由 Geert Uytterhoeven 提交于
During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their pinctrl register state is lost. Note that as the boot loader skips most initialization after system resume, pinctrl register state differs from the state encountered during normal system boot, too. To fix this, save all GPIO and peripheral function select, module select, drive strength control, bias, and other I/O control registers during system suspend, and restore them during system resume. Note that to avoid overhead on platforms not needing it, the suspend/resume code has a build time dependency on sleep and PSCI support, and a runtime dependency on PSCI. Inspired by a patch in the BSP by Hien Dang. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Geert Uytterhoeven 提交于
All users of sh_pfc_pin_to_bias_info() and the related data structures have been converted to sh_pfc_pin_to_bias_reg(), so those can be removed. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
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由 Geert Uytterhoeven 提交于
Add a helper to look up bias registers and bit number for a specific pin, using the generic bias register description. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Geert Uytterhoeven 提交于
On modern Renesas SoCs, all PFC registers are 32-bit, and all callers of sh_pfc_{read,write}_reg() already operate on 32-bit registers only. Hence make the 32-bit width implicit, and rename the functions to sh_pfc_{read,write}() to shorten lines. All accesses to 8-bit or 16-bit registers are still done using sh_pfc_{read,write}_raw_reg(). Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
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由 Geert Uytterhoeven 提交于
As of commit 8682b3c5 ("sh-pfc: Remove platform device registration"), plain "sh-pfc" platform devices are no longer created. Hence remove their match entry, and the now obsolete checks for missing device IDs and driver data. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
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- 16 8月, 2017 1 次提交
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由 Takeshi Kihara 提交于
This patch adds initial pinctrl driver to support for the R8A77995 SoC. Signed-off-by: NTakeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: whitespace] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 16 5月, 2017 2 次提交
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由 Sergei Shtylyov 提交于
Renesas RZ/G1E (R8A7745) is pin compatible with R-Car E2 (R8A7794), however it doesn't have several automotive specific peripherals. Annotate all the items that only exist on the R-Car SoCs... Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NRob Herring <robh@kernel.org> [geert: Drop annotations, as they are implied by pin groups/functions] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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由 Sergei Shtylyov 提交于
Renesas RZ/G1M (R8A7743) is pin compatible with R-Car M2-W/N (R8A7791/3), however it doesn't have several automotive specific peripherals. Annotate all the items that only exist on the R-Car SoCs and only supply the pin groups/functions existing on a given SoC... Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NRob Herring <robh@kernel.org> [geert: Drop annotations, as they are implied by pin groups/functions] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 21 3月, 2017 1 次提交
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由 Geert Uytterhoeven 提交于
Update the sh_pfc_soc_info pointer after calling the SoC-specific initialization function, as it may have been updated to e.g. handle different SoC revisions. This makes sure the correct subdriver name is printed later. Fixes: 0c151062 ("sh-pfc: Add support for SoC-specific initialization") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 15 11月, 2016 1 次提交
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由 Niklas Söderlund 提交于
On some SoC there are no simple mapping of pins to bias register bits and a lookup table is needed. This logic is already implemented in some SoC specific drivers that could benefit from a generic implementation. Add helpers to deal with the lookup which later can be used by the SoC specific drivers. The logic used to lookup are different from the one it aims to replace, this is intentional. This new method reduces the memory consumption at the cost of increased CPU usage and fix a bug where a WARN() would incorrectly be triggered if the register offset is 0. Signed-off-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 19 8月, 2016 1 次提交
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由 Takeshi Kihara 提交于
This patch adds initial pinctrl driver to support for the R8A7796 SoC. Signed-off-by: NTakeshi Kihara <takeshi.kihara.df@renesas.com> [uli: rebased on top of renesas-drivers] Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 08 8月, 2016 1 次提交
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由 Sergei Shtylyov 提交于
Add the PFC support for the R8A7792 SoC including pin groups for some on-chip devices such as SCIF, INTC, and LBSC... Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> [geert: s/LSBC/LBSC/] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 21 6月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
This allows to remove the .remove() callback, and all functions and data it needed for its own bookkeeping. Suggested-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 4月, 2016 1 次提交
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由 Geert Uytterhoeven 提交于
If CONFIG_PINCTRL_SH_PFC_GPIO=n: drivers/pinctrl/sh-pfc/core.c: In function 'sh_pfc_remove': drivers/pinctrl/sh-pfc/core.c:649:17: warning: unused variable 'pfc' [-Wunused-variable] Fixes: 67ec8d7b ("pinctrl: ish-pfc: Use devm_pinctrl_register() for pinctrl registration") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 4月, 2016 1 次提交
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由 Laxman Dewangan 提交于
Use devm_pinctrl_register() for pin control registration. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: linux-renesas-soc@vger.kernel.org Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 3月, 2016 1 次提交
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由 Wolfram Sang 提交于
If pinctrl_provide_dummies() is used unconditionally, then the dummy state will be used even on DT platforms when the "init" state was intentionally left out. Instead of "default", the dummy "init" state will then be used during probe. Thus, when probing an I2C controller on cold boot, communication triggered by bus notifiers broke because the pins were not initialized. Do it like OMAP2: use the dummy state only for non-DT platforms. Cc: stable@vger.kernel.org Fixes: ef0eebc0 ("drivers/pinctrl: Add the concept of an "init" state") Reported-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 3月, 2016 1 次提交
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由 Laurent Pinchart 提交于
Add support for the drive-strengh pin configuration using the generic pinconf DT bindings. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 09 3月, 2016 2 次提交
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由 Wolfram Sang 提交于
This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Paul Gortmaker 提交于
The Kconfig / Makefile currently controlling compilation of this code is: drivers/pinctrl/sh-pfc/Makefile:obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o drivers/pinctrl/sh-pfc/Makefile:sh-pfc-objs = core.o pinctrl.o drivers/pinctrl/sh-pfc/Kconfig:config PINCTRL_SH_PFC drivers/pinctrl/sh-pfc/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init already wasn't being used in this code, the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: linux-renesas-soc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 2月, 2016 1 次提交
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由 Magnus Damm 提交于
The sh-pfc pinctrl driver is currently handling SoC-specific PFC hardware blocks on ARM64, ARM and SH architectures. For older SoCs using SH cores and some 32-bit ARM SoCs the PFC hardware also provides GPIO functionality. On the majority of 32-bit ARM SoCs from Renesas and so far all ARM64 SoCs the GPIO feature is provided by separate hardware blocks. So far GPIO support in the PFC driver has been compiled-in for the majority of the SoCs, but with this patch applied the SoCs with PFC support may select from one of the following: - CONFIG_PINCTRL_SH_PFC - Used if PFC lacks GPIO hardware - CONFIG_PINCTRL_SH_PFC_GPIO - Used if PFC includes GPIO support This patch results in the following changes: - The GPIO functionality is only compiled-in on relevant SoCs - The number of lines of code is reduced Build tested using the following configurations: - r8a7795 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM64) - r8a7790 -> CONFIG_PINCTRL_SH_PFC_GPIO=n -> OK (ARM) - r8a7790 + r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM) - r8a7740 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (ARM) - sh7751 -> CONFIG_PINCTRL_SH_PFC=n -> OK (SH rts7751r2d1) - sh7724 -> CONFIG_PINCTRL_SH_PFC_GPIO=y -> OK (SH ecovec24) Signed-off-by: NMagnus Damm <damm+renesas@opensource.se> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> [geert: s/def_bool n/bool/] Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 20 10月, 2015 3 次提交
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由 Geert Uytterhoeven 提交于
Since the removal of the r8a7778 legacy SoC code in commit 4baadb9e ("ARM: shmobile: r8a7778: remove obsolete setup code"), r8a7778 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Since the removal of the r8a7779 legacy SoC code in commit c99cd90d ("ARM: shmobile: r8a7779: Remove legacy SoC code"), r8a7779 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but also various other pinmux-related data (functions and marks). Every single driver already calls its local array pinmux_data[]. Hence rename the sh_pfc_soc_info member to "pinmux_data". Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
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- 02 10月, 2015 1 次提交
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由 Takeshi Kihara 提交于
Add PFC base support for the R8A7795 SoC. Signed-off-by: NTakeshi Kihara <takeshi.kihara.df@renesas.com> [Morimoto-san: updated] Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
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- 16 7月, 2015 3 次提交
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由 Geert Uytterhoeven 提交于
Since the removal of the r8a7740 legacy SoC code in commit 44d88c75 ("ARM: shmobile: Remove legacy SoC code for R-Mobile A1"), r8a7740 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Since the removal of the sh73a0 legacy SoC code in commit 9a986398 ("ARM: shmobile: Remove legacy SoC code for SH-Mobile AG5"), sh73a0 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
If the pin function controller (which can be a GPIO controller) is instantiated before the interrupt controllers, due to the ordering in the DTS, the irq domains for the interrupt controllers referenced by its "interrupts-extended" property cannot be found yet: irq: no irq domain found for /interrupt-controller@e61c0000 ! As the sh-pfc driver accesses the platform device's resources directly, it cannot find the (optional) IRQ resources, and thinks no interrupts are available. This may lead to failures later, when GPIOs are used as interupts: gpio-keys keyboard: Unable to claim irq 0; error -22 gpio-keys: probe of keyboard failed with error -22 To fix this, add support for deferred probing to sh-pfc, by converting the driver from direct platform device resource access to using the platform_get_resource() and platform_get_irq() helpers. Note that while this fixes the root cause worked around by commit e4ba0a9b ("ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bug"), I strongly recommend against reverting the workaround now, as this would lead to lots of probe deferrals in drivers relying on pinctrl. This may be reconsidered once the DT code starts taking into account phandle dependencies during device instantation. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 6月, 2015 1 次提交
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由 Hisashi Nakamura 提交于
Add PFC support for the R8A7794 SoC including pin groups for some on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF... Sergei: squashed together several patches, fixed the MLB_CLK typo, added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin group names, removed stray new line and fixed typos in the comments in the pinmux_config_regs[] initializer, removed the platform device ID, took into account limited number of signals in the GPIO1/5/6 controllers, added reasonable and removed unreasonable copyrights, modified the bindings document, renamed, added changelog. Changes in version 5: - resolved rejects, refreshed the patch; - added Laurent Pinchart's ACK. Changes in version 4: - reused the PORT_GP_26() macro to #define PORT_GP_28(). Changes in version 3: - removed the platform device ID; - added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the CPU_ALL_PORT() macro. Changes in version 2: - rebased the patch. Signed-off-by: NHisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 12 5月, 2015 2 次提交
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由 Ulrich Hecht 提交于
Regarding pin control, r8a7791 and r8a7793 are identical, so it is sufficient to add an sh_pfc_soc_info structure to enable r8a7793 support. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
As of commit 9d07d414 ("ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform"), r8a73a4 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 18 3月, 2015 6 次提交
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由 Geert Uytterhoeven 提交于
The r8a7790 platform is now DT-only, the driver doesn't need to match platform devices by name anymore. Remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
The emev2 platform is now DT-only, the driver doesn't need to match platform devices by name anymore. Remove the corresponding platform_device_id entry. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Currently all PFC registers lie in low 32-bit address space. Hence use u32 instead of unsigned long to store PFC register addresses in pinctrl tables. All calculations of virtual addresses use a phys_addr_t intermediate, so we know where to add an offset if the 32-bit assumption ever becomes false. While this doesn't impact 32-bit builds, it would save ca. 7 KiB on a 64-bit shmobile_defconfig kernel. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
As register and field widths and offsets are in the range 1..32, use unsigned int (mostly replacing unsigned long) to store them in local variables and for passing them around. Move to one variable per line, move variables to the beginning of the block where they are used, and drop superfluous initializations while we are at it. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Register and field widths are in the range 1..32. Storing them in the pinctrl data in (arrays of) unsigned long wastes space. This decreases the size of a (32-bit) shmobile_defconfig kernel supporting 7 SoCs by 26460 bytes. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
As PFC registers are either 8, 16, or 32 bits wide, use u32 (mostly replacing unsigned long) to store (parts of) register values and masks. Switch the shadow register operations from {set,clear}_bit() to plain C bit operations, as the former can operate on long data only. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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