1. 04 9月, 2017 1 次提交
  2. 16 5月, 2017 1 次提交
  3. 26 10月, 2015 1 次提交
    • R
      MIPS: Use ARCH_USE_BUILTIN_BSWAP. · 1ee3630a
      Ralf Baechle 提交于
      ARCH_USE_BUILTIN_BSWAP will use __builtin_bswap16(), __builtin_bswap32()
      and __builtin_bswap64() where available.  This allows better instruction
      scheduling.  On pre-R2 processors it will result in 32 bit and 64 bit
      swapping being performed in a call to a __bswapsi2() rsp. __bswapdi2()
      functions, so we add these, too.
      
      For a 4.2 kernel with GCC 4.9 this yields the following kernel sizes:
      
         text    data     bss     dec     hex filename
      3996071  155804   88992 4240867  40b5e3 vmlinux         ip22 baseline
      3985687  159900   88992 4234579  409d53 vmlinux         ip22 + bswap patch
      6913157  378552  251024 7542733  7317cd vmlinux         ip27 baseline
      6878581  378552  251024 7508157  7290bd vmlinux         ip27 + bswap patch
      5773777  268752  187424 6229953  5f0fc1 vmlinux         malta baseline
      5773401  268752  187424 6229577  5f0e49 vmlinux         malta + bswap patch
      
      Presumably the code size improvments yield better cache hit rate thus
      better performance compensating for the extra function call but this
      will still need to be benchmarked.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      1ee3630a
  4. 17 2月, 2015 1 次提交
  5. 09 11月, 2012 2 次提交
    • J
      MIPS: Make irqflags.h functions preempt-safe for non-mipsr2 cpus · e97c5b60
      Jim Quinlan 提交于
      For non MIPSr2 processors, such as the BMIPS 5000, calls to
      arch_local_irq_disable() and others may be preempted, and in doing
      so a stale value may be restored to c0_status.  This fix disables
      preemption for such processors prior to the call and enables it
      after the call.
      
      Those functions that needed this fix have been "outlined" to
      mips-atomic.c, as they are no longer good candidates for inlining.
      
      This bug was observed in a BMIPS 5000, occuring once every few hours
      in a continuous reboot test.  It was traced to the write_lock_irq()
      function which was being invoked in release_task() in exit.c.
      By placing a number of "nops" inbetween the mfc0/mtc0 pair in
      arch_local_irq_disable(), which is called by write_lock_irq(), we
      were able to greatly increase the occurance of this bug.  Similarly,
      the application of this commit silenced the bug.
      Signed-off-by: NJim Quinlan <jim2101024@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: David Daney <ddaney.cavm@gmail.com>
      Cc: Kevin Cernekee cernekee@gmail.com
      Cc: Jim Quinlan <jim2101024@gmail.com>
      Patchwork: https://patchwork.linux-mips.org/patch/4321/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e97c5b60
    • J
      MIPS: Remove irqflags.h dependency from bitops.h · 92d11594
      Jim Quinlan 提交于
      The "else clause" of most functions in bitops.h invoked
      raw_local_irq_{save,restore}() and in doing so had a dependency on
      irqflags.h.  This fix moves said code to bitops.c, removing the
      dependency.
      Signed-off-by: NJim Quinlan <jim2101024@gmail.com>
      Cc: linux-mips@linux-mips.org
      Cc: David Daney <ddaney.cavm@gmail.com>
      Cc: Kevin Cernekee cernekee@gmail.com
      Cc: Jim Quinlan <jim2101024@gmail.com>
      Patchwork: https://patchwork.linux-mips.org/patch/4320/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      92d11594
  6. 23 8月, 2012 1 次提交
  7. 23 7月, 2012 1 次提交
  8. 08 12月, 2011 1 次提交
  9. 19 5月, 2011 1 次提交
  10. 08 6月, 2009 1 次提交
    • R
      MIPS: Outline udelay and fix a few issues. · 5636919b
      Ralf Baechle 提交于
      Outlining fixes the issue were on certain CPUs such as the R10000 family
      the delay loop would need an extra cycle if it overlaps a cacheline
      boundary.
      
      The rewrite also fixes build errors with GCC 4.4 which was changed in
      way incompatible with the kernel's inline assembly.
      
      Relying on pure C for computation of the delay value removes the need for
      explicit.  The price we pay is a slight slowdown of the computation - to
      be fixed on another day.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      5636919b
  11. 11 1月, 2009 1 次提交
  12. 28 10月, 2008 1 次提交
  13. 27 8月, 2007 1 次提交
  14. 11 7月, 2007 2 次提交
  15. 06 7月, 2007 1 次提交
  16. 11 5月, 2007 1 次提交
  17. 05 3月, 2007 1 次提交
  18. 27 2月, 2007 1 次提交
  19. 20 2月, 2007 1 次提交
    • R
      [MIPS] Fixup copy_from_user_inatomic · e03b5269
      Ralf Baechle 提交于
      From the 01408c49 log message:
      
      The problem is that when we write to a file, the copy from userspace to
      pagecache is first done with preemption disabled, so if the source
      address is not immediately available the copy fails *and* *zeros* *the*
      *destination*.
      
      This is a problem because a concurrent read (which admittedly is an odd
      thing to do) might see zeros rather that was there before the write, or
      what was there after, or some mixture of the two (any of these being a
      reasonable thing to see).
      
      If the copy did fail, it will immediately be retried with preemption
      re-enabled so any transient problem with accessing the source won't
      cause an error.
      
      The first copying does not need to zero any uncopied bytes, and doing
      so causes the problem.  It uses copy_from_user_atomic rather than
      copy_from_user so the simple expedient is to change copy_from_user_atomic
      to *not* zero out bytes on failure.
      
      < --- end cite --- >
      
      This patch finally implements at least a not so pretty solution by
      duplicating the relevant part of __copy_user.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e03b5269
  20. 19 2月, 2007 1 次提交
    • R
      [MIPS] Iomap implementation. · 140c1729
      Ralf Baechle 提交于
      This implementation has support for the concept of one separate ioport
      address space by PCI domain.  A pointer to the virtual address where
      the port space of a domain has been mapped has been added to struct
      pci_controller and systems should be fixed to fill in this value. For
      single domain systems this will be the same value as passed to
      set_io_port_base().
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      140c1729
  21. 07 2月, 2007 1 次提交
  22. 09 1月, 2007 1 次提交
  23. 05 12月, 2006 1 次提交
  24. 20 6月, 2006 1 次提交
  25. 30 10月, 2005 1 次提交
  26. 15 9月, 2005 1 次提交
    • D
      [LIB]: Consolidate _atomic_dec_and_lock() · 4db2ce01
      David S. Miller 提交于
      Several implementations were essentialy a common piece of C code using
      the cmpxchg() macro.  Put the implementation in one spot that everyone
      can share, and convert sparc64 over to using this.
      
      Alpha is the lone arch-specific implementation, which codes up a
      special fast path for the common case in order to avoid GP reloading
      which a pure C version would require.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4db2ce01
  27. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4