1. 26 5月, 2014 1 次提交
    • V
      ARM: 8043/1: uprobes need icache flush after xol write · 72e6ae28
      Victor Kamensky 提交于
      After instruction write into xol area, on ARM V7
      architecture code need to flush dcache and icache to sync
      them up for given set of addresses. Having just
      'flush_dcache_page(page)' call is not enough - it is
      possible to have stale instruction sitting in icache
      for given xol area slot address.
      
      Introduce arch_uprobe_ixol_copy weak function
      that by default calls uprobes copy_to_page function and
      than flush_dcache_page function and on ARM define new one
      that handles xol slot copy in ARM specific way
      
      flush_uprobe_xol_access function shares/reuses implementation
      with/of flush_ptrace_access function and takes care of writing
      instruction to user land address space on given variety of
      different cache types on ARM CPUs. Because
      flush_uprobe_xol_access does not have vma around
      flush_ptrace_access was split into two parts. First that
      retrieves set of condition from vma and common that receives
      those conditions as flags.
      
      Note ARM cache flush function need kernel address
      through which instruction write happened, so instead
      of using uprobes copy_to_page function changed
      code to explicitly map page and do memcpy.
      
      Note arch_uprobe_copy_ixol function, in similar way as
      copy_to_user_page function, has preempt_disable/preempt_enable.
      Signed-off-by: NVictor Kamensky <victor.kamensky@linaro.org>
      Acked-by: NOleg Nesterov <oleg@redhat.com>
      Reviewed-by: NDavid A. Long <dave.long@linaro.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      72e6ae28
  2. 19 3月, 2014 1 次提交