- 07 3月, 2014 1 次提交
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由 Paul Burton 提交于
The GIC IPI functions aren't necessarily specific to the "CMP framework" SMP implementation, and will be used elsewhere in a subsequent commit. This patch adds cleaned up GIC IPI functions to a separate file which is compiled when a new CONFIG_MIPS_GIC_IPI Kconfig symbol is selected, and selects that symbol for CONFIG_MIPS_CMP. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6359/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 25 1月, 2014 5 次提交
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由 Mark Salter 提交于
Architectures which might use an i8042 for serial IO to keyboard, mouse, etc should select ARCH_MIGHT_HAVE_PC_SERIO. Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NRalf Baechle <ralf@linux-mips.org> CC: linux-mips@linux-mips.org Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6232/
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由 Florian Fainelli 提交于
Broadcom BCM63xx DSL SoCs have a L1-cache line size of 16 bytes (shift value of 4) instead of the currently configured 32 bytes L1-cache line size. Reported-by: NDaniel Gonzalez <dgcbueu@gmail.com> Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
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由 Florian Fainelli 提交于
All platforms that require a special MIPS_L1_CACHE_SHIFT value have been updated, such that we can now make MIPS_L1_CACHE_SHIFT default to the appropriate integer value based on the select MIPS_L1_CACHE_SHIFT_<N> variable. Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
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由 Florian Fainelli 提交于
In order to avoid keeping an ever growing list of chips which need to select a specific MIPS_L1_CACHE_SHIFT value introduce multiple internal and non-exposed Kconfig symbols for the various MIPS_L1_CACHE_SHIFT values out there and update the relevant Kconfig symbols to select them. Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
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由 Jayachandran C 提交于
Add MSI chip and MSIX chip definitions. For MSI, we map the link interrupt to a MSI link IRQ which will do a second level of dispatch based on the MSI status register. The MSI chip definitions use the MSI enable register to enable and disable the MSI irqs. For MSI-X, we split the 32 available MSI-X vectors across the four PCIe links (8 each). These PIC interrupts generate an IRQ per link which uses a second level dispatch as well. The MSI-X chip definition uses the standard functions to enable and disable interrupts. Signed-off-by: NJayachandran C <jchandra@broadcom.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6270/
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- 24 1月, 2014 2 次提交
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由 Alexandre Bounine 提交于
Allow modular build option for RapidIO subsystem core in MIPS and PowerPC architectural branches. At this moment modular RapidIO subsystem build is enabled only for platforms that use PCI/PCIe based RapidIO controllers (e.g. Tsi721). Signed-off-by: NAlexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Jean Delvare <jdelvare@suse.de> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Li Yang <leoli@freescale.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Robert Graffham 提交于
Remove an outdated reference to "most personal computers" having only one CPU, and change the use of "singleprocessor" and "single processor" in CONFIG_SMP's documentation to "uniprocessor" across all arches where that documentation is present. Signed-off-by: NRobert Graffham <psquid@psquid.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 1月, 2014 18 次提交
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由 Qais Yousef 提交于
if the user sets memsize parameter in commandline or bootloader environment, we use it to modify the built-in dtb memory size Signed-off-by: NQais Yousef <qais.yousef@imgtec.com> Reviewed-by: NPaul Burton <paul.burton@imgtec.com> Reviewed-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6207/
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由 Paul Burton 提交于
This patch switches Malta from using the MIPS implementation of early printk with Malta's prom_putchar to using the generic 8250_early implementation. This offers a couple of advantages: - We duplicate less generic code. - The UART can be initialised rather than being reliant upon inheriting a valid setup from the bootloader. The Malta console_config function is extended to initialise the early console if no earlycon= kernel parameter is provided, inheriting the modetty0 bootloader environment if present and falling back to a default 38400n8r setup if not. This matches the behaviour used for the regular console= parameter. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Reviewed-by: NMarkos Chandras <markos.chandras@imgtec.com> Reviewed-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6183/
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由 Felix Fietkau 提交于
Only one MIPS development board actually supports enabling/disabling DMA coherency at runtime, so it's not a good idea to push the overhead of checking that configuration setting onto every other supported target as well. Signed-off-by: NFelix Fietkau <nbd@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5912/
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由 Steven J. Hill 提交于
Clean-up code according to the 'checkpatch.pl' script. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: NQais Yousef <Qais.Yousef@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/6097/Reviewed-by: NJohn Crispin <blogic@openwrt.org>
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由 Deng-Cheng Zhu 提交于
This patch adds RTLX API support for platforms having a CMP. Signed-off-by: NDeng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: NQais Yousef <Qais.Yousef@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/6095/Reviewed-by: NJohn Crispin <blogic@openwrt.org>
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由 Deng-Cheng Zhu 提交于
Split the RTLX functionality in preparation for adding support for CMP platforms. Common functions remain in the original file and a new file contains code specific to platforms that do not have a CMP. Signed-off-by: NDeng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: NQais Yousef <Qais.Yousef@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/6093/Reviewed-by: NJohn Crispin <blogic@openwrt.org>
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由 Deng-Cheng Zhu 提交于
This patch adds VPE loader support for platforms having a CMP. Signed-off-by: NDeng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: NQais Yousef <Qais.Yousef@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6092/
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由 Deng-Cheng Zhu 提交于
Split the VPE functionality in preparation for adding support for CMP platforms. Common functions remain in the original file and a new file contains code specific to platforms that do not have a CMP present. Signed-off-by: NDeng-Cheng Zhu <dengcheng.zhu@imgtec.com> Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: NQais Yousef <Qais.Yousef@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6094/
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由 Steven J. Hill 提交于
This patch accomplishes the following: * Clean up wording on all MIPS MT configuration menu items. * Simplify and neaten up options selected by MIPS_MT_SMP. * Make MIPS_MT_SMTC support as deprecated. * Make MIPS_CMP support to depend on MIPS_MT_SMP also. * Remove redundant options selected by MIPS_CMP. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6019/
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由 Hauke Mehrtens 提交于
The BCM47xx SoCs have a 8250 serial compatible console at address 0x18000300 and an other at 0x18000400. On most devices 0x18000300 is wired to some pins on the board, we should use that. This is the smae for the AI (bcma) and the SB (ssb) bus, this is some offset on the chip common core. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5889/
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由 Hauke Mehrtens 提交于
bcm47xx only uses the CFE code for early print to a console, but that is also possible with a early print serial 8250 driver. The CFE api init causes hangs somewhere in prom_init_cfe() on some devices like the Buffalo WHR-HP-G54 and the Asus WL-520GU. This was reported in https://dev.openwrt.org/ticket/4061 and https://forum.openwrt.org/viewtopic.php?id=17063 This will remove all the CFE handling code from bcm47xx. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Tested-by: NAaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5888/
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由 Jonas Gorski 提交于
All MIPS cores on BCM63XX identify as Broadcom, not MIPS, so no need to support non-broadcom MIPS CPUs. This also ensures that CPU_BMIPS is always selected. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6246/
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由 Jonas Gorski 提交于
Let each supported chip select the appropirate SYS_HAS_CPU_BMIPS* option for its embedded processor, so support will be conditionally included. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6250/
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由 Jonas Gorski 提交于
Add a helper similar to the generic register_XXX_smp_ops() for bmips. Register SMP UP ops in case of BMIPS32/3300. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6248/
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由 Jonas Gorski 提交于
Codewise there is no difference between these two, so it does not make sense to treat them differently. Also chip families having one of these tend to have the other. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6247/
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由 Jonas Gorski 提交于
As they are MIPS32 CPUs they do support the prefetch opcode. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6243/
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由 Jonas Gorski 提交于
All BMIPS CPUs support HIGHMEM, so it should be selected by CPU_BMIPS. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6242/
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由 Jonas Gorski 提交于
Instead of treating each flavour as an exclusive CPU to select, make BMIPS the only option and let SYS_HAS_CPU_BMIPS* decide for which flavours to include support. Run tested on BMIPS3300 and BMIPS4350, only build tested for BMIPS4380 and BMIPS5000. Signed-off-by: NJonas Gorski <jogo@openwrt.org> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6240/
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- 14 1月, 2014 1 次提交
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由 Paul Burton 提交于
CPUs implementing MIPS32 R2 may include a 64-bit FPU, just as MIPS64 CPUs do. In order to preserve backwards compatibility a 64-bit FPU will act like a 32-bit FPU (by accessing doubles from the least significant 32 bits of an even-odd pair of FP registers) when the Status.FR bit is zero, again just like a mips64 CPU. The standard O32 ABI is defined expecting a 32-bit FPU, however recent toolchains support use of a 64-bit FPU from an O32 MIPS32 executable. When an ELF executable is built to use a 64-bit FPU a new flag (EF_MIPS_FP64) is set in the ELF header. With this patch the kernel will check the EF_MIPS_FP64 flag when executing an O32 binary, and set Status.FR accordingly. The addition of O32 64-bit FP support lessens the opportunity for optimisation in the FPU emulator, so a CONFIG_MIPS_O32_FP64_SUPPORT Kconfig option is introduced to allow this support to be disabled for those that don't require it. Inspired by an earlier patch by Leonid Yegoshin, but implemented more cleanly & correctly. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Paul Burton <paul.burton@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/6154/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 03 1月, 2014 1 次提交
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由 Mark Salter 提交于
Architectures which might use an i8042 for serial IO to keyboard, mouse, etc should select ARCH_MIGHT_HAVE_PC_SERIO. Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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- 20 12月, 2013 1 次提交
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由 Kees Cook 提交于
Instead of duplicating the CC_STACKPROTECTOR Kconfig and Makefile logic in each architecture, switch to using HAVE_CC_STACKPROTECTOR and keep everything in one place. This retains the x86-specific bug verification scripts. Signed-off-by: NKees Cook <keescook@chromium.org> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org Link: http://lkml.kernel.org/r/1387481759-14535-2-git-send-email-keescook@chromium.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 15 11月, 2013 1 次提交
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由 Christoph Hellwig 提交于
We've switched over every architecture that supports SMP to it, so remove the new useless config variable. Signed-off-by: NChristoph Hellwig <hch@lst.de> Cc: Jan Kara <jack@suse.cz> Cc: Jens Axboe <axboe@kernel.dk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 10月, 2013 7 次提交
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由 Ralf Baechle 提交于
Nobody seems to care about this platform anymore and my attempts to find somebody willing to provide some tlc for PowerTV have failed so far. So let's nuke the bloody thing. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5910/
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由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Ralf Baechle 提交于
This enables /proc/<pid>/syscall and the ptrace PTRACE_GETREGSET and PTRACE_SETREGSET operations. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Yoichi Yuasa 提交于
Signed-off-by: NYoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/948/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Florian Fainelli 提交于
Add support for the LZ4 compression scheme in the ZBOOT decompression stub, in order to support it we need to: - select the "lz4" compression tool to compress the vmlinux.bin payload - memcpy() is also required for decompress_unlz4.c so we share the implementation between GZIP, XZ and now LZ4 Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: james.hogan@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/5829/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Florian Fainelli 提交于
Add support for the XZ compression scheme in the ZBOOT decompression stub, in order to support it we need to: - select the "xzkern" compression tool to compress the vmlinux.bin payload - link with ashldi3.o for xz_dec_run() to work - memcpy() is also required for decompress_unxz.c so we share the implementation between GZIP and XZ Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: james.hogan@imgtec.com Patchwork: https://patchwork.linux-mips.org/patch/5818/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Markos Chandras 提交于
The CMP code is only designed to work with SMP configurations. Fixes multiple build problems on certain randconfigs: In file included from arch/mips/kernel/smp-cmp.c:34:0: arch/mips/include/asm/smp.h:28:0: error: "raw_smp_processor_id" redefined [-Werror] In file included from include/linux/sched.h:30:0, from arch/mips/kernel/smp-cmp.c:22: include/linux/smp.h:135:0: note: this is the location of the previous definition In file included from arch/mips/kernel/smp-cmp.c:34:0: arch/mips/include/asm/smp.h:57:20: error: redefinition of 'smp_send_reschedule' In file included from include/linux/sched.h:30:0, from arch/mips/kernel/smp-cmp.c:22: include/linux/smp.h:179:20: note: previous definition of 'smp_send_reschedule' was here In file included from arch/mips/kernel/smp-cmp.c:34:0: arch/mips/include/asm/smp.h: In function 'smp_send_reschedule': arch/mips/include/asm/smp.h:61:8: error: dereferencing pointer to incomplete type [...] Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/5812/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 24 10月, 2013 1 次提交
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由 Mark Salter 提交于
Architectures which support CONFIG_PARPORT_PC should select ARCH_MIGHT_HAVE_PC_PARPORT. Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NRalf Baechle <ralf@linux-mips.org> CC: linux-mips@linux-mips.org
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- 13 9月, 2013 1 次提交
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由 Martin Schwidefsky 提交于
After the last architecture switched to generic hard irqs the config options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code for !CONFIG_GENERIC_HARDIRQS can be removed. Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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- 05 9月, 2013 1 次提交
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由 John Crispin 提交于
Add a helper for reseting different devices on the SoC. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5804/ Patchwork: https://patchwork.linux-mips.org/patch/5797/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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