- 02 8月, 2010 4 次提交
-
-
由 Samu Onkalo 提交于
Omap DMA controller can prefetch data in advance in case of destination synchronized data transfer. This may increase performance when target HW block doesn't have fifo. Data is waiting for transfer request in DMA fifo instead of read from memory. Signed-off-by: NSamu Onkalo <samu.p.onkalo@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Fix GPIO numbers and smc91x for 2430sdp. The earlier code had cut and paste errors from 3430sdp code. Also, 2430 has five GPIO banks for a total of 160 GPIO lines. Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Cory Maccarrone 提交于
This change adds in the necessary clocks and mux pins for UART control on omap7xx devices. I also made a change in the serial code to only try and initialize two UARTs in omap_serial_init, as these devices don't have three. Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Recent DEBUG_LL and uncompress.h changes removed the check_port() as pointed out by Cory Maccarrone <darkstar6262@gmail.com>. This causes some boards to not boot, so add back the MDR1 register check. The MDR1 register tells the mode of omap uart. Based on an earlier patch by Cory Maccarrone <darkstar6262@gmail.com>. Tested-by: NCory Maccarrone <darkstar6262@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 10 6月, 2010 2 次提交
-
-
由 Kevin Hilman 提交于
The addition of the new debounce code (commit 168ef3d9) broke the auto-disable of debounce clocks on idle by forgetting to update the debounce clock enable mask. Add back the updating of bank->dbck_enable_mask so debounce clocks are auto-disabled. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tero Kristo 提交于
The kernel timer queue is being run currently from a GP timer running in a one shot mode, which works in a way that when it expires, it will also stop. Usually during this situation, the interrupt handler will ack the interrupt, load a new value to the timer and start it again. During suspend, the situation is slightly different, as we disable interrupts just before timekeeping is suspended, which leaves a small window where the timer can expire before it is stopped, and will leave the interrupt flag pending. This pending interrupt will prevent ARM sleep entry, thus now we ack it always when we are attempting to stop a timer. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> [tony@atomide.com: removed the ifdef to make the patch cover omap1 also] Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 09 6月, 2010 1 次提交
-
-
由 Satish 提交于
The memory allocated for sgt structure is not freed on error when sg_alloc_table is called in sgtable_alloc(). Signed-off-by: NSatish Kumar <x0124230@ti.com> Signed-off-by: NManjunatha GK <manjugk@ti.com> Cc: Vimal Singh <vimal.newwork@gmail.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: NTony Lindgen <tony@atomide.com>
-
- 28 5月, 2010 2 次提交
-
-
由 Felipe Balbi 提交于
Nobody uses that anymore, so remove and expect drivers to use the gpiolib implementation. Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> Cc: Tony Lindgren <tony@atomide.com> Cc: David Brownell <david-b@pacbell.net> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
由 Felipe Balbi 提交于
OMAP supports debouncing of gpio lines, implement the method using gpiolib. Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> Cc: Tony Lindgren <tony@atomide.com> Cc: David Brownell <david-b@pacbell.net> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 21 5月, 2010 21 次提交
-
-
由 Anand Gadiyar 提交于
Add platform init code for the OMAP3 OHCI driver. Also, configure padconf settings for OMAP3 depending on which port mode is used. Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
-
由 Ajay Kumar Gupta 提交于
EXTVBUS programming is required by OMAP3EVM REV >=E to supply 500mA power so adding a flag which can be used by musb driver to program EXTVBUS. Signed-off-by: NAjay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
-
由 Tony Lindgren 提交于
Add support for i2c init for omap4. This patch is based on and earlier patch by Santosh Shilimkar <santosh.shilimkar@ti.com>. Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Add separate omap_i2c_add_bus functions for mach-omap1 and mach-omap2. Make the mach-omap2 init set the interrupt dynamically to support. This is needed to add support for omap4 in a way that works with multi-omap builds. This will eventually get fixed in a generic way with the omap hwmods. Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Paul Walmsley 提交于
Add some missing credits for people who have contributed significant features or fixes. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Thara Gopinath <thara@ti.com>
-
由 Rajendra Nayak 提交于
Some powerdomains in OMAP4 support a direct transition from one sleep state to another deeper sleep state without having to wakeup the powerdomain. This patch adds an api in the powerdomain framework to set the LOWPOWERSTATECHANGE bit in PWRSTCTRL register. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Rajendra Nayak 提交于
The pwrsts flag for ALWAYS ON domains like always_on_core_pwrdm and wkup_pwrdm is wrongly populated with the define for a powerdomain power state, instead of the allowable state bitfields. This causes a few api's to fail sensing invalid pwrst requested. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Rajendra Nayak 提交于
The clock sources for timers on OMAP4 (system clock and 32k clock) have their names wronly populated. This patch fixes them so the omap_dm_timer_set_source does not fail anymore. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Rajendra Nayak 提交于
Remove the hack put in place while clock framework was still not in place for OMAP4. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Benoit Cousson 提交于
The MPU subsystem was named based on internal code name (CHIRON). This patch will remove all the occurences of the chiron name are replace it with PRCM_MPU in order to differentiate the MPU local PRCM to the global one. Remove PDA_ from PRCM_MPU registers names to stick to the global PRM naming convention. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
-
由 Benoit Cousson 提交于
Some initiator modules in OMAP2 & 3 does not have IDLEST bit, in that case we cannot detect the module readiness by polling that bit and must exist the function immediately assuming that the module is ready. The previous flag was affected to the OCP interface. While it is technically true that the idlest is related to the L4 slave interface of the module, the PRCM status belong to the module. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Benoit Cousson 提交于
Accessing the clkctrl register using offset of module & device is hard to do in OMAP4 due to the way the CM1, CM2, PRM and PRCM_MPU are located in the address space. There is no common base address anymore for all the CM registers. The easiest way to handle that on OMAP4 is to provide the absolute address of the XXX_CLKCTRL register per hwmod. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
-
由 Paul Walmsley 提交于
Clean up comment style, remove unnecessary includes, and resolve some checkpatch warnings in plat-omap/clock.c. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Paul Walmsley 提交于
Rename the RATE_IN_343X clksel_rate.rate flag to be RATE_IN_3XXX, to reflect that these rates are valid on all OMAP3 platforms, not just 343X. Also rename the RATE_IN_OMAP3430ES2 clksel_rate.rate flag to be RATE_IN_OMAP3430ES2PLUS, to reflect that these flags are valid on all OMAP3 platforms after 3430ES2. This patch should not result in any functional changes. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com>
-
由 Paul Walmsley 提交于
The DEFAULT_RATE clksel_rate flag is essentially useless. It was set on some of the lowest divisors, which, when switching to a much higher-rate parent, could have potentially resulted in rates that exceeded the hardware specifications for downstream clocks in the window between the clk_set_parent(), and a subsequent clk_set_rate(). It seems much safer to just remove the flag and always use the highest available divisor (resulting in the lowest possible rate) after the switch, and this patch does so. Ideally, it would be best to first attempt to switch to a divisor that matches the clock's rate with the previous parent, if at all possible. But that is a project for some other day or some other person. The parent changing code is rarely used. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 kishore kadiyala 提交于
In OMAP4, MMC1 PBIAS and its associated IO is software-controlled by CONTROL_PBIAS and CONTROL_MMC1 registers. This patch adds PBIAS configuration for MMC1 Controller during power-ON and power-OFF of regulator. Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Charulatha V 提交于
Access to some of the OMAP4 GPIO registers are not properly handled. This patch fixes it. This patch is tested on 3430SDP and 4430SDP boards Signed-off-by: NCharulatha V <charu@ti.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Santosh Shilimkar 提交于
This patch moves OMAP4 soc specific code from 4430sdp board file. The change is necessary so that newer board support can be added with minimal changes. This will be also problematic for multi-board, multi-omap builds. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 stanley.miao 提交于
AM3517 don't have the register OMAP343X_CONTROL_PBIAS_LITE and the regulators like "vmmc", so we set a noop "set_power" function for it. Signed-off-by: NStanley.Miao <stanley.miao@windriver.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 manjugk manjugk 提交于
Multi line comments are fixed as per CodingStyle guidelines. Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NManjunatha GK <manjugk@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Mika Westerberg 提交于
If we are softbooting another kernel using kexec, DMA controller state is not known when we are performing omap_init_dma(). It is possible that some DMA channels are already active. For example after kexec we get: <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 <4>IRQ 0020 for non-allocated DMAchannel 5 To prevent any weird things happening, we disable all channel interrupts during init. Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 20 5月, 2010 1 次提交
-
-
由 Kalle Jokiniemi 提交于
While waiting for completion of the i2c transfer, the MPU could hit OFF mode and cause several msecs of delay that made i2c transfers fail more often. The extra delays and subsequent re-trys cause i2c clocks to be active more often. This has also an negative effect on power consumption. Created a mechanism for passing and using the constraint setting function in driver code. The used mpu wake up latency constraints are now set individually per bus, and they are calculated based on clock rate and fifo size. Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley, and Nishanth Menon for tuning out the details of this patch. Updates by Kevin as requested by Tony: - Remove omap_set_i2c_constraint_func() in favor of conditionally adding the flag in omap_i2c_add_bus() in order to keep all the OMAP conditional checking in a single location. - Update set_mpu_wkup_lat prototypes to match OMAP PM layer so OMAP PM function can be used directly in pdata. Cc: Moiz Sonasath <m-sonasath@ti.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
-
- 14 5月, 2010 9 次提交
-
-
由 Jorge Eduardo Candelaria 提交于
McBSP module in OMAP4 needs to be able to set its tx/rx threshold and enable the transmitter/receiver when starting an audio stream. Signed-off-by: NJorge Eduardo Candelaria <jorge.candelaria@ti.com> Signed-off-by: NMargarita Olaya Cabrera <magi.olaya@ti.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
-
由 Jorge Eduardo Candelaria 提交于
In OMAP4, there is only one irq line for TX and RX paths. Use the correct irq line to avoid errors at runtime. Also, request irq line only once (instead of requesting for TX and RX). Signed-off-by: NJorge Eduardo Candelaria <jorge.candelaria@ti.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
-
由 Hiroshi DOYU 提交于
This rejects unaligned device virtual address('da') and physical address('pa') and informs error to caller when a page table entry is set. Otherwise, a wrong address can be used by IO device. Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: Hari Kanigeri <h-kanigeri2@ti.com>
-
由 Hiroshi DOYU 提交于
Searching avaialable spaces should be stopped as soon as it turns out that there's no possibility with the rest of it. Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
-
由 Hiroshi DOYU 提交于
Inserting a gap page between IOVMAs could detect an override on other IOVMA with iommu fault. This was originally suggested by Sakari Ailus and based on the work and comment by David Cohen. Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: David Cohen <david.cohen@nokia.com> Cc: Sakari Ailus <Sakari.Ailus@nokia.com>
-
由 Hiroshi DOYU 提交于
This CONFIG_OMAP_IOMMU_DEBUG option cannot be selected because it's not visible on menu. Make this option selectable. Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-
由 Hiroshi DOYU 提交于
There are some places to scan iotlb entries. This iteration macro could make these code a bit simpler with proceeding iotlb entries transparently. Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Tested-by: NHari Kanigeri <h-kanigeri2@ti.com>
-
由 Kanigeri, Hari 提交于
This patch adds TLB preservation support to IOMMU module Signed-off-by: NHari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
-
由 Kanigeri, Hari 提交于
This patch provides the iommu support for OMAP4 co-processors. Signed-off-by: NHari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com>
-