1. 10 3月, 2009 1 次提交
  2. 18 2月, 2009 2 次提交
  3. 17 2月, 2009 1 次提交
  4. 15 2月, 2009 1 次提交
    • Y
      x86: fix typo in filter_cpuid_features() · f6db44df
      Yinghai Lu 提交于
      Impact: fix wrong disabling of cpu features
      
      an amd system got this strange output:
      
       CPU: CPU feature monitor disabled due to lack of CPUID level 0x5
      
      but in /proc/cpuinfo I have:
      
       cpuid level	: 5
      
      on intel system:
      
       CPU: CPU feature monitor disabled due to lack of CPUID level 0x5
       CPU: CPU feature dca disabled due to lack of CPUID level 0x9
      
      but in /proc/cpuinfo i have:
      
       cpuid level     : 11
      
      Tt turns out there is a typo, and we should use level member in df.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f6db44df
  5. 10 2月, 2009 1 次提交
    • T
      x86: implement x86_32 stack protector · 60a5317f
      Tejun Heo 提交于
      Impact: stack protector for x86_32
      
      Implement stack protector for x86_32.  GDT entry 28 is used for it.
      It's set to point to stack_canary-20 and have the length of 24 bytes.
      CONFIG_CC_STACKPROTECTOR turns off CONFIG_X86_32_LAZY_GS and sets %gs
      to the stack canary segment on entry.  As %gs is otherwise unused by
      the kernel, the canary can be anywhere.  It's defined as a percpu
      variable.
      
      x86_32 exception handlers take register frame on stack directly as
      struct pt_regs.  With -fstack-protector turned on, gcc copies the
      whole structure after the stack canary and (of course) doesn't copy
      back on return thus losing all changed.  For now, -fno-stack-protector
      is added to all files which contain those functions.  We definitely
      need something better.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      60a5317f
  6. 09 2月, 2009 1 次提交
  7. 31 1月, 2009 2 次提交
  8. 29 1月, 2009 3 次提交
  9. 28 1月, 2009 1 次提交
  10. 27 1月, 2009 2 次提交
  11. 24 1月, 2009 2 次提交
    • H
      x86: filter CPU features dependent on unavailable CPUID levels · b38b0665
      H. Peter Anvin 提交于
      Impact: Fixes potential crashes on misconfigured systems.
      
      Some CPU features require specific CPUID levels to be available in
      order to function, as they contain information about the operation of
      a specific feature.  However, some BIOSes and virtualization software
      provide the ability to mask CPUID levels in order to support legacy
      operating systems.  We try to enable such CPUID levels when we know
      how to do it, but for the remaining cases, filter out such CPU
      features when there is no way for us to support them.
      
      Do this in one place, in the CPUID code, with a table-driven approach.
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      b38b0665
    • H
      x86: handle PAT more like other CPU features · 75a04811
      H. Peter Anvin 提交于
      Impact: Cleanup
      
      When PAT was originally introduced, it was handled specially for a few
      reasons:
      
      - PAT bugs are hard to track down, so we wanted to maintain a
        whitelist of CPUs.
      - The i386 and x86-64 CPUID code was not yet unified.
      
      Both of these are now obsolete, so handle PAT like any other features,
      including ordinary feature blacklisting due to known bugs.
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      75a04811
  12. 21 1月, 2009 3 次提交
    • T
      x86: uv cleanup · bdbcdd48
      Tejun Heo 提交于
      Impact: cleanup
      
      Make the following uv related cleanups.
      
      * collect visible uv related definitions and interfaces into uv/uv.h
        and use it.  this cleans up the messy situation where on 64bit, uv
        is defined properly, on 32bit generic it's dummy and on the rest
        undefined.  after this clean up, uv is defined on 64 and dummy on
        32.
      
      * update uv_flush_tlb_others() such that it takes cpumask of
        to-be-flushed cpus as argument, instead of that minus self, and
        returns yet-to-be-flushed cpumask, instead of modifying the passed
        in parameter.  this interface change will ease dummy implementation
        of uv_flush_tlb_others() and makes uv tlb flush related stuff
        defined in tlb_uv proper.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      bdbcdd48
    • B
      x86: set %fs to __KERNEL_PERCPU unconditionally for x86_32 · 0dd76d73
      Brian Gerst 提交于
      Impact: cleanup
      
      %fs is currently set to __KERNEL_DS at boot, and conditionally
      switched to __KERNEL_PERCPU for secondary cpus.  Instead, initialize
      GDT_ENTRY_PERCPU to the same attributes as GDT_ENTRY_KERNEL_DS and
      set %fs to __KERNEL_PERCPU unconditionally.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      0dd76d73
    • B
      x86: clean up gdt_page definition · 06deef89
      Brian Gerst 提交于
      Impact: cleanup && more compact percpu area layout with future changes
      
      Move 64-bit GDT to page-aligned section and clean up comment
      formatting.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      06deef89
  13. 20 1月, 2009 3 次提交
  14. 18 1月, 2009 8 次提交
  15. 16 1月, 2009 3 次提交
    • T
      x86: make pda a percpu variable · b12d8db8
      Tejun Heo 提交于
      [ Based on original patch from Christoph Lameter and Mike Travis. ]
      
      As pda is now allocated in percpu area, it can easily be made a proper
      percpu variable.  Make it so by defining per cpu symbol from linker
      script and declaring it in C code for SMP and simply defining it for
      UP.  This change cleans up code and brings SMP and UP closer a bit.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b12d8db8
    • T
      x86: fold pda into percpu area on SMP · 1a51e3a0
      Tejun Heo 提交于
      [ Based on original patch from Christoph Lameter and Mike Travis. ]
      
      Currently pdas and percpu areas are allocated separately.  %gs points
      to local pda and percpu area can be reached using pda->data_offset.
      This patch folds pda into percpu area.
      
      Due to strange gcc requirement, pda needs to be at the beginning of
      the percpu area so that pda->stack_canary is at %gs:40.  To achieve
      this, a new percpu output section macro - PERCPU_VADDR_PREALLOC() - is
      added and used to reserve pda sized chunk at the start of the percpu
      area.
      
      After this change, for boot cpu, %gs first points to pda in the
      data.init area and later during setup_per_cpu_areas() gets updated to
      point to the actual pda.  This means that setup_per_cpu_areas() need
      to reload %gs for CPU0 while clearing pda area for other cpus as cpu0
      already has modified it when control reaches setup_per_cpu_areas().
      
      This patch also removes now unnecessary get_local_pda() and its call
      sites.
      
      A lot of this patch is taken from Mike Travis' "x86_64: Fold pda into
      per cpu area" patch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1a51e3a0
    • T
      x86: use static _cpu_pda array · c8f3329a
      Tejun Heo 提交于
      _cpu_pda array first uses statically allocated storage in data.init
      and then switches to allocated bootmem to conserve space.  However,
      after folding pda area into percpu area, _cpu_pda array will be
      removed completely.  Drop the reallocation part to simplify the code
      for soon-to-follow changes.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c8f3329a
  16. 11 1月, 2009 1 次提交
  17. 08 1月, 2009 1 次提交
  18. 04 1月, 2009 2 次提交
    • M
      x86: cleanup remaining cpumask_t ops in smpboot code · c2d1cec1
      Mike Travis 提交于
      Impact: use new cpumask API to reduce memory and stack usage
      
      Allocate the following local cpumasks based on the number of cpus that
      are present.  References will use new cpumask API.  (Currently only
      modified for x86_64, x86_32 continues to use the *_map variants.)
      
          cpu_callin_mask
          cpu_callout_mask
          cpu_initialized_mask
          cpu_sibling_setup_mask
      
      Provide the following accessor functions:
      
          struct cpumask *cpu_sibling_mask(int cpu)
          struct cpumask *cpu_core_mask(int cpu)
      
      Other changes are when setting or clearing the cpu online, possible
      or present maps, use the accessor functions.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Acked-by: NRusty Russell <rusty@rustcorp.com.au>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c2d1cec1
    • M
      x86: cleanup some remaining usages of NR_CPUS where s/b nr_cpu_ids · 9628937d
      Mike Travis 提交于
      Impact: Reduce future system panics due to cpumask operations using NR_CPUS
      
      Insure that code does not look at bits >= nr_cpu_ids as when cpumasks are
      allocated based on nr_cpu_ids, these extra bits will not be defined.
      
      Also some other minor updates:
      
         * change in to use cpu accessor function set_cpu_present() instead of
           directly accessing cpu_present_map w/cpu_clear() [arch/x86/kernel/reboot.c]
      
         * use cpumask_of() instead of &cpumask_of_cpu() [arch/x86/kernel/reboot.c]
      
         * optimize some cpu_mask_to_apicid_and functions.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Acked-by: NRusty Russell <rusty@rustcorp.com.au>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9628937d
  19. 20 12月, 2008 1 次提交
  20. 02 11月, 2008 1 次提交
    • A
      x86: Hypervisor detection and get tsc_freq from hypervisor · 88b094fb
      Alok Kataria 提交于
      Impact: Changes timebase calibration on Vmware.
      
      v3->v2 : Abstract the hypervisor detection and feature (tsc_freq) request
      	 behind a hypervisor.c file
      v2->v1 : Add a x86_hyper_vendor field to the cpuinfo_x86 structure.
      	 This avoids multiple calls to the hypervisor detection function.
      
      This patch adds function to detect if we are running under VMware.
      The current way to check if we are on VMware is following,
      #  check if "hypervisor present bit" is set, if so read the 0x40000000
         cpuid leaf and check for "VMwareVMware" signature.
      #  if the above fails, check the DMI vendors name for "VMware" string
         if we find one we query the VMware hypervisor port to check if we are
         under VMware.
      
      The DMI + "VMware hypervisor port check" is needed for older VMware products,
      which don't implement the hypervisor signature cpuid leaf.
      Also note that since we are checking for the DMI signature the hypervisor
      port should never be accessed on native hardware.
      
      This patch also adds a hypervisor_get_tsc_freq function, instead of
      calibrating the frequency which can be error prone in virtualized
      environment, we ask the hypervisor for it. We get the frequency from
      the hypervisor by accessing the hypervisor port if we are running on VMware.
      Other hypervisors too can add code to the generic routine to get frequency on
      their platform.
      Signed-off-by: NAlok N Kataria <akataria@vmware.com>
      Signed-off-by: NDan Hecht <dhecht@vmware.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      88b094fb