For cuImage format it's necessary to provide clock fixups since u-boot will
not pass necessary clock frequency into the dtb included into cuImage so we
implement the clock fixups as defined in the technical documentation for the
board and update header file with the basic register definitions.
Signed-off-by: NTiejun Chen <tiejun.chen@windriver.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Some U-Boot versions incorrectly set the number of chipselects to two
for Sequoia/Rainier boards while they only have one chipselect hardwired.
This patch adds a workaround for this, hardcoding the number of chipselects
to one for sequioa/rainer board models and reading the actual value from
the memory controller register DDR0_10 otherwise.

It also fixes another error in the way ibm4xx_denali_fixup_memsize
calculates memory size. When testing the DDR_REDUC bit, the polarity is
backwards.  A "1" implies 32-bit wide memory while a "0" implies 64-bit
wide memory.
Signed-off-by: NMikhail Zolotaryov <lebon@lebon.org.ua>
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NSteven A. Falco <sfalco@harris.com>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

The PowerPC 440EP, 440GR, 440EPx, and 440GRx chips have an issue that
causes the PLB3-to-PLB4 bridge to wait indefinitely for transaction
requests that cross the end-of-memory-range boundary.  Since the DDR
controller only returns the valid portion of a read request, the bridge
will prevent other PLB masters from completing their transactions.

This implements the recommended workaround for this errata for chips that
use older versions of firmware that do not already handle it.  The last
4KiB of memory are hidden from the kernel to prevent the problem
transactions from occurring.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

logical/bitand typo
Signed-off-by: NRoel Kluin <12o3l@tiscali.nl>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This patch adds support for 405GPr processors with optional
new mode strapping. ibm405gp_fixup_clocks() can now be used
for 405GP and 405GPr CPUs.

This is in preparation of porting the cpci405 platform support
from arch/ppc to arch/powerpc.

This patch also adds ibm405ep_fixup_clocks() to support
405EP CPUs from the boot wrapper.
Signed-off-by: NMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Remove some unneeded braces and make a busy loop more obvious.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This reworks the boot wrapper library function that probes
the chip clocks. Better separate the base function that is
used on 440GX,SPe,EP,... from the uart fixups as those need
different device-tree path on different processors.

Also, rework the function itself based on the arch/ppc code
from Eugene Surovegin which I find more readable, and which
handles one more bypass case. Also handle the subtle difference
between 440EP/EPx and 440SPe/GX, on the former, PerClk is derived
from the PLB clock while on the later, it's derived from the OPB.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This adds a function to the bootwrapper 4xx library to decode memory
size on 440SPE processors.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD
comes from a device-tree property, PCI is working to the point where
I can see the video card, USB device, and south bridge.

This should work with both EP405 and EP405PC.

I've not totally figured out how IRQs are wired on this hardware
though, thus at this stage, expect only USB interrupts working,
pretty much the same as what arch/ppc did.

Also, the flash, nvram, rtc and temp control still have to be wired.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Bootwrapper code for AMCC PPC440EPx Sequoia.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add a bootwrapper for the AMCC 440EP Bamboo Eval board.  This also adds a
common fixup_clock function for all 440EP(x) chips.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

Make the fixup_memsize function common for all of 4xx as several chips share
the same SDRAM controller.  Also add functions to reset 40x chips and quiesce
the ethernet.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Rename the 44x.c wrapper file to 4xx.c.  This will allow us to add common
functions in a single file that can be shared across all of 4xx.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

In the device tree for Ebony, the 'ranges' property in the node for
the EBC bridge shows the mappings from the chip select / address lines
actually used for the EBC peripherals into the address space of the
OPB.  At present, these mappings are hardcoded in ebony.dts for the
mappings set up by the OpenBIOS firmware when it configures the EBC
bridge.

This replaces the hardcoded mappings with code in the zImage to
read the EBC configuration registers and create an appropriate ranges
property based on them.  This should make the zImage and kernel more
robust to changes in firmware configuration.  In particular, some of
the Ebony's DIP switches can change the effective address of the Flash
and other peripherals in OPB space.  With this patch, the kernel will
be able to cope with at least some of the possible variations.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

The ebony_exit() function which resets the Ebony board should in fact
be common to most if not all 44x boards.  This moves the function out
into 44x.c, renaming it, so it can be used by other 44x platforms.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

This adds platform support code for the Ebony (440GP) evaluation
board.  This includes both code in arch/powerpc/platforms/44x for
board initialization, and zImage wrapper code to correctly tweak the
flattened device tree based on information from the firmware.  The
zImage supports both IBM OpenBIOS (aka "treeboot") and old versions of
uboot which don't support a flattened device tree.
Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>