Some devices need a while to boot their firmware after providing clks /
de-asserting resets before they are ready to receive sdio commands.

This commits adds a post-power-on-delay-ms devicetree property to
mmc-pwrseq-simple for use with such devices.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

On some boards (android tablets) different batches use different sdio
wifi modules. This is not a problem since mmc/sdio is an enumerable bus,
so we only need to describe and activate the mmc controller in dt and
then the kernel will automatically load the right driver.

Sometimes it is useful to specify certain ethernet properties for these
"unknown" sdio devices, specifically we want the boot-loader to be able
to set "local-mac-address" as some of these sdio wifi modules come without
an eeprom / without a factory programmed mac address.

Since the exact device is unknown (differs per batch) we cannot use
a wifi-chip specific compatible, thus sometimes it is desirable to have a
mmc function node, without having to make up an otherwise unused compatible
for the node, so make the compatible property optional.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

It turns out that sun4i (A10) and sun5i (A13 & co) do not have sample
clocks, so add a new sun7i-a20-mmc compatible and do not try to use
sample clocks on sun4i / sun5i.

Since sun4i / sun5i do not have sample clocks, they cannot (reliably) do
DDR rates, so only set MMC_CAP_1_8V_DDR when we do have sample clks.

Note this patch leaves the clk_prepare_enable() / clk_disable_unprepare()
calls to the sample clks as-is, without adding checks for them being
NULL. All the clk_foo calls accept a NULL clk and will return success when
called with a NULL clk.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The interconnect (ICN) clock is required for functional working of
MMC on some ST platforms.  When not supplied it can result in
broken MMC and the following output:

        [   13.916949] mmc0: Timeout waiting for hardware interrupt.
        [   13.922349] sdhci: =========== REGISTER DUMP (mmc0)===========
        [   13.928175] sdhci: Sys addr: 0x00000000 | Version:  0x00001002
        [   13.933999] sdhci: Blk size: 0x00007040 | Blk cnt:  0x00000001
        [   13.939825] sdhci: Argument: 0x00fffff0 | Trn mode: 0x00000013
        [   13.945650] sdhci: Present:  0x1fff0206 | Host ctl: 0x00000011
        [   13.951475] sdhci: Power:    0x0000000f | Blk gap:  0x00000080
        [   13.957300] sdhci: Wake-up:  0x00000000 | Clock:    0x00003f07
        [   13.963126] sdhci: Timeout:  0x00000004 | Int stat: 0x00000000
        [   13.968952] sdhci: Int enab: 0x02ff008b | Sig enab: 0x02ff008b
        [   13.974777] sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000
        [   13.980602] sdhci: Caps:     0x21ed3281 | Caps_1:   0x00000000
        [   13.986428] sdhci: Cmd:      0x0000063a | Max curr: 0x00000000
        [   13.992252] sdhci: Host ctl2: 0x00000000
        [   13.996166] sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x7c048200
        [   14.001990] sdhci: ===========================================
        [   14.009802] mmc0: Got data interrupt 0x02000000 even though no data operation was in progress.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The driver has supported touchscreen-fw-name to specify the firmware to
load since it has been merged, but this was omitted from the dt-binding
documentation.

During review of adding touchscreen-fw-name to the binding documentation
it was brought up that there is a standard property name called
"firmware-name" for this, which should be used.

Since there are no users of touchscreen-fw-name yet, this commit
adds documentation of "firmware-name" to the dt-binding documentation
and switches the driver over to use this.

This commit also makes the driver add a "silead/" prefix to the
firmware name from dt before calling request_firmware. That the
firmware files are stored under /lib/firmware/silead under Linux
is an implementation detail and does not belong in devicetree.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

Serial console is broken in v4.8-rcX. Mika and I independently bisected down to
commit 4ef03d32 ("tty/serial/8250: use mctrl_gpio helpers").

Since neither author nor anyone else didn't propose a solution we better revert
it for now.

This reverts commit 4ef03d32.

Link: https://lkml.kernel.org/r/20160809130229.GN1729@lahna.fi.intel.comSigned-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

SARADC controller needs to be reset before programming it, otherwise
it will not function properly.
Signed-off-by: NCaesar Wang <wxt@rock-chips.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-iio@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Tested-by: NGuenter Roeck <linux@roeck-us.net>
Cc: <Stable@vger.kernel.org>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>

See the thermal code, the obvious typo from my editor.
Signed-off-by: NCaesar Wang <wxt@rock-chips.com>
Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>

This reverts commit 65aca64d.

The patches for twl6040 MFD and clk missed the merge window and
causing the McPDM driver to never probe since it is put back to
the deferred list because the missing drivers.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

Instead of a ramoops-specific node, use a child node of /reserved-memory.
This requires that of_platform_device_create() be explicitly called
for the node, though, since "/reserved-memory" does not have its own
"compatible" property.
Suggested-by: NRob Herring <robh@kernel.org>
Signed-off-by: NKees Cook <keescook@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>

This is a driver for SiS 9200 family touchscreen controllers using I2C bus.
Signed-off-by: NMika Penttilä <mika.penttila@nextfour.com>
Acked-by: NTammy Tseng <tammy_tseng@sis.com>
Acked-by: NYuger Yu <yuger_yu@sis.com>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

This driver adds support for Silead touchscreens. It has been tested
with GSL1680 and GSL3680 touch panels.

It supports ACPI and device tree enumeration. Screen resolution,
the maximum number of fingers supported and firmware name are
configurable.
Signed-off-by: NRobert Dolca <robert.dolca@intel.com>
Signed-off-by: NDaniel Jansen <djaniboe@gmail.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

Buck and LDO binding name changes.

The binding names for the regulators have been changed to match the current
expectation from existing device tree source files.

This fix rectifies the disparity between what currently exists in some
.dts[i] board files and what is listed in this binding document. This
change re-aligns those differences and also brings the binding document
in-line with the expectations of the product datasheet from Dialog
Semiconductor.

Bucks and LDOs now follow the expected notation:
{ buck1, buck2, buck3, buck4 }
{ ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7, ldo8, ldo9, ldo10 }
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: NRob Herring <robh@kernel.org>

Add the device tree binding documentation for the PDC hardware
in Broadcom iProc SoCs.
Signed-off-by: NRob Rice <rob.rice@broadcom.com>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NRay Jui <ray.jui@broadcom.com>
Reviewed-by: NAnup Patel <anup.patel@broadcom.com>
Reviewed-by: NScott Branden <scott.branden@broadcom.com>
Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>

It's not advisable to use this encoding, but to support existing devices
add support for this to the driver.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>

Add the documentation for the Device Tree binding for the Aardvark PCIe
controller, found on Marvell Armada 3700 ARM64 SoCs.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Signed-off-by: NIyappan Subramanian <isubramanian@apm.com>
Tested-by: NFushen Chen <fchen@apm.com>
Tested-by: NToan Le <toanle@apm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Document the pwm-dutycycle-unit and pwm-dutycycle-range properties.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NBrian Norris <briannorris@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NMark Brown <broonie@kernel.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Document support for the Watchdog Timer (WDT) Controller in the Renesas
R-Car M3-W (r8a7796) SoC.

No driver update is needed.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

The ChromeOS Embedded Controller can support controlling its attached
PWMs via its host-command interface. The number of supported PWMs varies
on a per-board basis, but we can autodetect this by checking the error
codes, so we don't need an extra property for this. And because the EC
only allows specifying the duty cycle and not the period, we don't
specify the period via pwm-cells, and instead have only support for one
cell -- to specify the index.
Signed-off-by: NBrian Norris <briannorris@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

add tuning start point binding
Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch adds description for no-sd, no-sdio, no-mmc. We expose
these to DT as some of the controllers are unable to deal with
special cmd type due to hw limitation.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As of an earlier change in this series ("Documentation: mmc:
sdhci-of-arasan: Add ability to export card clock") the SDHCI driver
used on Rockchip SoCs can now expose its clock.  Let's now specify that
the PHY can use it.

Letting the PHY get access to this clock means it can adjust
phyctrl_frqsel field appropriately.  Although the Rockchip PHY appears
slightly different than the reference Arasan one, you can see that the
Arasan datasheet [1] had it defined as:
  Select the frequency range of DLL operation:
  3b'000 => 200MHz to 170 MHz
  3b'001 => 170MHz to 140 MHz
  3b'010 => 140MHz to 110 MHz
  3b'011 => 110MHz to 80MHz
  3b'100 => 80MHz to 50 MHz
  3b'101 => 275Mhz to 250MHz
  3b'110 => 250MHz to 225MHz
  3b'111 => 225MHz to 200MHz

On the Rockchip version of the PHY we have less granularity but the idea
is the same.

[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdfSigned-off-by: NDouglas Anderson <dianders@chromium.org>
Acked-by: NKishon Vijay Abraham I <kishon@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock frequency in order to
function properly.  Physically in a SoC this clock is exported from the
SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
Let's export the SDHCI card clock using a standard device tree mechanism
so that the PHY can get access to it and query the card clock frequency.
Signed-off-by: NDouglas Anderson <dianders@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As can be seen in Arasan's datasheet [1] there are several "corecfg"
settings in their SDHCI IP Block that are supposed to be controlled by
software.  Although the datasheet referenced is a bit vague about how to
access corecfg, in Figure 5 you can see that for Arasan's PHY (a
separate component than their SDHCI component) they describe the
"phyctrl" registers as being "FROM SOC CTL REG", implying that it's up
to the licensee of the Arasan IP block to implement these registers.  It
seems sane to assume that the "corecfg" registers in their SDHCI IP
block works in a similar way for all licensees of the IP Block.

Device tree has a model that allows a device to get a reference to
random registers located elsewhere in the SoC: sysctl.  Let's leverage
this model and allow adding a sysctl reference to access the control
registers for the Arasan SDHCI PHYs.

Having a reference to the control registers doesn't do much for us on
its own since the Arasan spec doesn't specify how these corecfg values
are laid out in memory.  In the SDHCI driver we'll need a map detailing
where each corecfg can be found in each implementation.  This map can be
found using the primary compatible string of the SDHCI device.  In that
spirit, document that existing rk3399 device trees already have a
specific compatible string, though up to now they've always been relying
on the driver supporting the generic.

Note that since existing devices seem to work fairly well as-is, we'll
list the syscon reference as "optional", but it's likely that we'll run
into much fewer problems if we can actually set the proper values in the
syscon, so it is strongly suggested that any SoCs where we have a map to
set the corecfg also include a reference to the syscon.

[1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdfSigned-off-by: NDouglas Anderson <dianders@chromium.org>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The example includes the properties required to enable UHS modes.
Signed-off-by: NAl Cooper <alcooperx@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The sdhci-iproc also supports bcm2835. So this binding is obsolete.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

mmc-hs400-enhanced-strobe is used to claim that the
host can support hs400 mode with enhanced strobe
introduced by emmc 5.1 spec.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NDouglas Anderson <dianders@chromium.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Signed-off-by: NOtto Kekäläinen <otto@seravo.fi>
Signed-off-by: NRob Herring <robh@kernel.org>

The documentation currently uses the non-standard vendor prefix stm
and st-micro for STMicroelectronics. The drivers do not specify the
vendor prefixes since the I2C Core strips them away from the DT
provided compatible string. Therefor, changing documentation and
existing device trees does not have any impact on device detection.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NRob Herring <robh@kernel.org>

Update the iProc GPIO binding document to add new compatible strings
"brcm,iproc-nsp-gpio" and "brcm,iproc-stingray-gpio" to support the
iProc based GPIO controller used in the NSP and Stingray SoCs,
respectively
Signed-off-by: NRay Jui <ray.jui@broadcom.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Renesas  R8A7792 SoC is a member of the R-Car gen2 family, add support for
its GPIO controllers.
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds the APM X-Gene hwmon device tree node documentation.
Signed-off-by: NHoan Tran <hotran@apm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

Add support for using with both wl12xx and wl18xx.

- all wilink family needs special init command for entering wspi mode.
  extra clock cycles should be sent after the spi init command while the
  cs pin is high.
- Use inverted chip select for sending a dummy 4 bytes command that
  completes the init stage.
Signed-off-by: NEyal Reizer <eyalr@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>

The command flow is exactly the same, the core simply needs to be
told to enable TPM2 mode when the compatible string indicates a
TPM2.
Signed-off-by: NAndrew Azmansky <andrew.zamansky@nuvoton.com>
Tested-by: NAndrew Zamansky <andrew.zamansky@nuvoton.com>
Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NJarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: NJarkko Sakkinen <jarkko.sakkinen@linux.intel.com>

It can be hard for people not familiar with the CoreSight IP blocks
to make sense of the acronyms found in the current bindings.  As such
this patch expands each acronym in the hope of providing a better
description of the IP block they represent.
Signed-off-by: NMathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: NSudeep Holla <sudeep.holla@arm.com>
Reviewed-by: NSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: NRob Herring <robh@kernel.org>

Document cavium-pip rx-delay/tx-delay properties. Currently the board
specific values need to be hardcoded in the platform code, which we
want to avoid when moving to DT-only booting.
Signed-off-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRob Herring <robh@kernel.org>

Add binding document for the Cadence QSPI controller.
Signed-off-by: NGraham Moore <grmoore@opensource.altera.com>
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Alan Tull <atull@opensource.altera.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Graham Moore <grmoore@opensource.altera.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Yves Vandervennet <yvanderv@opensource.altera.com>
Cc: devicetree@vger.kernel.org
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Signed-off-by: NJohn Crispin <john@phrozen.org>
Cc: devicetree@vger.kernel.org
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>