- 19 9月, 2017 1 次提交
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由 jiada wang 提交于
Previously i.MX SPI controller only works in Master mode. This patch adds support to i.MX51, i.MX53 and i.MX6 ECSPI controller to work also in Slave mode. Currently SPI Slave mode support patch has the following limitations: 1. The stale data in RXFIFO will be dropped when the Slave does any new transfer. 2. One transfer can be finished only after all transfer->len data been transferred to master device 3. Slave device only accepts transfer->len data. Any data longer than this from master device will be dropped. Any data shorter than this from master will cause SPI to stuck due to mentioned HW limitation 2. 4. Only PIO transfer is supported in Slave mode. 5. Dynamic burst size adjust isn't supported in Slave mode. Following HW limitation applies: 1. ECSPI has a HW issue when works in Slave mode, after 64 words written to TXFIFO, even TXFIFO becomes empty, ECSPI_TXDATA keeps shift out the last word data, so we have to disable ECSPI when in slave mode after the transfer completes 2. Due to Freescale errata ERR003775 "eCSPI: Burst completion by Chip Select (SS) signal in Slave mode is not functional" burst size must be set exactly to the size of the transfer. This limit SPI transaction with maximum 2^12 bits. This errata affects i.MX53 and i.MX6 ECSPI controllers. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 30 8月, 2017 1 次提交
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由 Greg Ungerer 提交于
The commonly used mechanism of specifying the hardware or native chip-select on an SPI device in devicetree (that is "cs-gpios = <0>") does not result in the native chip-select being configured for use. So external SPI devices that require use of the native chip-select will not work. You can successfully specify native chip-selects if using a platform setup by specifying the cs-gpio as negative offset by 32. And that works correctly. You cannot use the same method in devicetree. The logic in the spi-imx.c driver during probe uses core spi function of_spi_register_master() in spi.c to parse the "cs-gpios" devicetree tag. For valid GPIO values that will be recorded for use, all other entries in the cs_gpios list will be set to -ENOENT. So entries like "<0>" will be set to -ENOENT in the cs_gpios list. When the SPI device registers are setup the code will use the GPIO listed in the cs_gpios list for the desired chip-select. If the cs_gpio is less then 0 then it is intended to be for a native chip-select, and its cs_gpio value is added to 32 to get the chipselect number to use. Problem is that with devicetree this can only ever be -ENOENT (which is -2), and that alone results in an invalid chip-select number. But also doesn't allow selection of the native chip-select at all. To fix, if the cs_gpio specified for this spi device is not a valid GPIO then use the "chip_select" (that is the native chip-select number) for hardware setup. Signed-off-by: NGreg Ungerer <gerg@linux-m68k.org> Reviewed-by: NVladimir Zapolskiy <vz@mleia.com> Tested-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 23 8月, 2017 1 次提交
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由 Arnd Bergmann 提交于
The newly added dynamic burst code produces a harmless warning on big-endian configurations: drivers/spi/spi-imx.c: In function 'spi_imx_buf_rx_swap_u32': drivers/spi/spi-imx.c:284:15: error: unused variable 'bytes_per_word' [-Werror=unused-variable] unsigned int bytes_per_word; ^~~~~~~~~~~~~~ drivers/spi/spi-imx.c: In function 'spi_imx_buf_tx_swap_u32': drivers/spi/spi-imx.c:319:15: error: unused variable 'bytes_per_word' [-Werror=unused-variable] unsigned int bytes_per_word; This adds another #ifdef around the variable declaration matching the one on the use. Fixes: 1673c81d ("spi: imx: dynamic burst length adjust for PIO mode") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 17 8月, 2017 1 次提交
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由 jiada wang 提交于
previously burst length (BURST_LENGTH) is always set to equal to bits_per_word, causes a 10us gap between each word in transfer, which significantly affects performance. This patch uses 32 bits transfer to simulate lower bits transfer, and adjusts burst length runtimely to use biggeest burst length as possible to reduce the gaps in transfer for PIO mode. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 26 7月, 2017 1 次提交
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由 Oleksij Rempel 提交于
To run spi-loopback-tests on HW without modifications, we need to disable Chip Select. This should avoid surprising side effects for SPI devices by testing patterns. Signed-off-by: NOleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 17 7月, 2017 2 次提交
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由 jiada wang 提交于
ECSPI contorller for iMX53 and iMX6 has few hardware issues comparing to iMX51. The change add possibility to detect which controller is used to apply possible workaround and limitations. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Acked-by: NRob Herring <robh@kernel.org> Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 jiada wang 提交于
Different ECSPI controller has different fifosize and DMA capability, instead of calling functions to identify these information by check devtype. add fifo_size and has_dmamode to spi_imx_devtype_data. so that these information can be directly accessed. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 21 6月, 2017 1 次提交
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由 Fabio Estevam 提交于
In case of spi_alloc_master() failure it is better to return the error immediately, so move the error check right after the allocation. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 07 6月, 2017 6 次提交
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由 Sascha Hauer 提交于
'bpw' is ambiguous and only the context makes sure if bytes_per_word or bits_per_word is meant. Use the full names instead to make reading the code easier. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
We already have bits_per_word in the private driver struct and bytes_per_word can be calculated from it, so remove bits_per_word. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
It's unnecessary to call spi_imx_dma_configure() from probe(). It will be called later anyway again when an actual DMA transfer is prepared. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
struct spi_imx_config used to hold data specific to the current transfer. However, other data is in the drivers private data struct. Let's drop struct spi_imx_config and put the variables into the drivers private data struct aswell. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
__spi_validate makes sure that every transfer has a valid bits_per_word and speed_hz setting. We do not need to fallback to values from the spi_device. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
When the spi_transfer given in spi_imx_setupxfer is NULL then we have nothing to do. Bail out early in this case so that we do not have to test for t != NULL multiple times later. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 24 5月, 2017 1 次提交
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由 Sascha Hauer 提交于
This reverts commits 8d4a6cad and 179547e1. Besides the problems already found with this patch it also modifies the spi transfer tx_buf in spi_imx_u32_swap_u8() and spi_imx_u32_swap_u16(). This is hidden from the compiler with an explicit cast from const void* to u32*, so no warning is issued. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 20 5月, 2017 1 次提交
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由 Jiada Wang 提交于
In case either transfer->tx_buf or transfer->rx_buf is NULL, manipulation of buffer in spi_imx_u32_swap_u[8|16]() will cause NULL pointer dereference crash. Add buffer check at very beginning of spi_imx_u32_swap_u[8|16](), to avoid such crash. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Reported-by: NLeonard Crestez <leonard.crestez@nxp.com> Tested-by: NLeonard Crestez <leonard.crestez@nxp.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 14 5月, 2017 1 次提交
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由 Jiada Wang 提交于
previously burst length (BURST_LENGTH) is always set to equal to bits_per_word, causes a 10us gap between each word in transfer, which significantly affects performance. This patch uses 32 bits transfer to simulate lower bits transfer, and adjusts burst length runtimely to use biggeest burst length as possible to reduce the gaps in transfer for PIO mode. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 4月, 2017 1 次提交
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由 Leif Middelschulte 提交于
This patch implements consideration of the SPI_READY mode flag as defined in spi.h. It extends the device tree bindings to support the values defined by the reference manual for the DRCTL field. Thus supporting edge-triggered and level-triggered bursts. Signed-off-by: NLeif Middelschulte <Leif.Middelschulte@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 07 1月, 2017 1 次提交
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由 Jiada Wang 提交于
Previously DMA watermark level is configured to fifosize/2, DMA mode can be used only when transfer length can be divided by 'watermark level * bpw', which makes DMA mode not pratical. This patch adjusts watermark level to largest number (no bigger than fifosize/2) which can divide 'tranfer length / bpw' for each transfer. Signed-off-by: NJiada Wang <jiada_wang@mentor.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 02 11月, 2016 1 次提交
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由 Robert Baldyga 提交于
Introduce additional output parameter in spi_imx_clkdiv_1() function to return result frequency and set it to spi_bus_clk. This fixes division by zero bug, which occurred in spi_imx_calculate_timeout() function. Signed-off-by: NRobert Baldyga <r.baldyga@hackerion.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 25 10月, 2016 1 次提交
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由 Martin Kaiser 提交于
Support DMA transfers on imx35 and compatible chipsets (imx31, imx25). If DMA can be used, set the start mode control (SMC) bit to start the SPI burst as soon as data is written into the tx fifo. Configure DMA requests when the fifo is half empty during tx or half full during rx. Signed-off-by: NMartin Kaiser <martin@kaiser.cx> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 29 9月, 2016 1 次提交
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由 Wei Yongjun 提交于
Fix to return error code -EINVAL if no CS GPIOs available instead of 0, as done elsewhere in this function. Fixes: f13d4e18 ("spi: imx: Gracefully handle NULL master->cs_gpios") Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 27 9月, 2016 1 次提交
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由 Marek Vasut 提交于
It is possible that master->cs_gpios is NULL after spi_bitbang_start(), this happens if the master has no CS GPIOs specified in DT. Check for this case after spi_bitbang_start() to prevent NULL pointer dereference in the subsequent for loop, which accesses the master->cs_gpios field. Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Martin Kaiser <martin@kaiser.cx> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 15 9月, 2016 2 次提交
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由 Martin Kaiser 提交于
imx35 and compatible chipsets support loopback mode by setting a loopback control bit in the test register. Make this setting available for data transfers, similar to what we do for imx51. Signed-off-by: NMartin Kaiser <martin@kaiser.cx> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Martin Kaiser 提交于
Modify spi_imx_clkdiv_2() to return the resulting bus clock frequency when the selected clock divider is applied. Set spi_imx->spi_bus_clk to this frequency. If spi_bus_clk is unset, spi_imx_calculate_timeout() causes a division by 0. Signed-off-by: NMartin Kaiser <martin@kaiser.cx> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 22 6月, 2016 1 次提交
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由 Christian Gmeiner 提交于
In some rare cases I see the following 'task blocked' information. It looks like the PIO transfer has some problems and never succeeds. Make use of wait_for_completion_timeout(..) to detect this case and return -ETIMEDOUT. [ 240.246067] INFO: task hexdump:1660 blocked for more than 120 seconds. [ 240.246089] Not tainted 4.1.17 0000001 [ 240.246099] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 240.246109] hexdump D c0575548 0 1660 1 0x00000000 [ 240.246132] Backtrace: [ 240.246166] [<c057524c>] (__schedule) from [<c0575a84>] (schedule+0x40/0xa4) [ 240.246176] r10:00000000 r9:c07f1300 r8:c07b8408 r7:c0576518 r6:7fffffff r5:7fffffff [ 240.246210] r4:ee972e7c [ 240.246233] [<c0575a44>] (schedule) from [<c0578544>] (schedule_timeout+0x174/0x274) [ 240.246254] [<c05783d0>] (schedule_timeout) from [<c0576518>] (wait_for_common+0xc0/0x164) [ 240.246263] r10:00000000 r9:c07f1300 r8:00000002 r7:00000000 r6:7fffffff r5:ee972e78 [ 240.246294] r4:ee972e7c [ 240.246314] [<c0576458>] (wait_for_common) from [<c05765dc>] (wait_for_completion+0x20/0x24) [ 240.246324] r10:ee972e50 r8:00000001 r7:c3976200 r6:ee972c00 r5:ee972e50 r4:c2c87d28 [ 240.246367] [<c05765bc>] (wait_for_completion) from [<c03f6b04>] (spi_imx_transfer+0xe8/0x3cc) [ 240.246393] [<c03f6a1c>] (spi_imx_transfer) from [<c03f50e4>] (spi_bitbang_transfer_one+0xb4/0x250) [ 240.246403] r10:ee972e50 r8:00000001 r7:00000000 r6:c2c87da0 r5:00000000 r4:c2c87d28 [ 240.246443] [<c03f5030>] (spi_bitbang_transfer_one) from [<c03f36e8>] (__spi_pump_messages+0x36c/0x6b4) [ 240.246452] r10:ee9e5010 r9:00000001 r8:ee9e5010 r7:00000000 r6:c2c87da0 r5:c2c87d6c [ 240.246483] r4:ee972c00 [ 240.246503] [<c03f337c>] (__spi_pump_messages) from [<c03f3b68>] (__spi_sync+0x138/0x1e4) [ 240.246512] r10:00000000 r9:00000000 r8:c03f25a8 r7:00000000 r6:ee972c00 r5:c3976200 [ 240.246542] r4:c2c87da0 [ 240.246562] [<c03f3a30>] (__spi_sync) from [<c03f3c50>] (spi_sync+0x1c/0x20) [ 240.246571] r10:00040000 r9:00000000 r8:c3976200 r7:00000000 r6:ee973300 r5:c2c87da0 [ 240.246602] r4:ee973014 [ 240.246623] [<c03f3c34>] (spi_sync) from [<c03f0210>] (m25p80_read+0xf8/0x124) [ 240.246641] [<c03f0118>] (m25p80_read) from [<c03f1528>] (spi_nor_read+0x64/0x80) [ 240.246651] r10:00004000 r8:00004000 r7:00000000 r6:00040000 r5:00000000 r4:ee973014 [ 240.246698] [<c03f14c4>] (spi_nor_read) from [<c03cdcb4>] (mtd_read+0x98/0xcc) [ 240.246708] r7:c2c87ea0 r6:ee973098 r5:00000000 r4:001c0000 [ 240.246740] [<c03cdc1c>] (mtd_read) from [<c03d300c>] (mtdchar_read+0xcc/0x204) [ 240.246750] r9:ed424000 r8:00000000 r7:b495d018 r6:c2c87f78 r5:00000000 r4:00040000 [ 240.246793] [<c03d2f40>] (mtdchar_read) from [<c013b1c4>] (__vfs_read+0x3c/0xe0) [ 240.246803] r10:00004000 r9:00000000 r8:c2c87f78 r7:b495d018 r6:c2c87f78 r5:c05c8104 [ 240.246833] r4:c32fe600 [ 240.246852] [<c013b188>] (__vfs_read) from [<c013befc>] (vfs_read+0x98/0x154) [ 240.246861] r10:00000000 r8:00040000 r7:00004000 r6:c2c87f78 r5:b495d018 r4:c32fe600 [ 240.246899] [<c013be64>] (vfs_read) from [<c013c008>] (SyS_read+0x50/0x90) [ 240.246908] r10:00000000 r8:00040000 r7:b495d018 r6:00004000 r5:c32fe601 r4:c32fe600 [ 240.246953] [<c013bfb8>] (SyS_read) from [<c000fa60>] (ret_fast_syscall+0x0/0x3c) [ 240.246962] r9:c2c86000 r8:c000fc04 r7:00000003 r6:00004000 r5:00000000 r4:b495d018 Signed-off-by: NChristian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 14 6月, 2016 3 次提交
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由 Alexander Shiyan 提交于
The SPI-driver no longer contains the conditions for various CPUs, so "maybe_unused" attributes is no longer needed. This patch removes these attributes. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Alexander Shiyan 提交于
SPI mode can be obtained directly from spi-device, there is no need to keep a copy. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Alexander Shiyan 提交于
Patch reuse existing "chip_select" and "cs_gpio(s)" fields from SPI core. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 17 3月, 2016 2 次提交
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由 Sascha Hauer 提交于
transfer could be NULL in spi_imx_can_dma() when it's called from spi_imx_setupxfer() with a NULL transfer. Test for a NULL pointer before dereferencing it. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Cc: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Knut Wohlrab 提交于
If the SPI chip select (CS) for a dedicated channel is done manually by the used higher device driver, the CS may be active while writing to ECSPIx_CONFIGREG. To prevent unwanted clock edges when selecting the clock mode, only do the necessary changes to the i.MX SPI configuration register and leave not selected channels untouched. To prevent unwanted clock edges on first use, an empty dummy transmission shall be done by the initialization procedure of the device driver of this channel. This will set the clock mode to the correct state. Signed-off-by: NKnut Wohlrab <knut.wohlrab@de.bosch.com> Signed-off-by: NDirk Behme <dirk.behme@de.bosch.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 26 2月, 2016 8 次提交
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由 Sascha Hauer 提交于
The driver tries to be clever by only setting up DMA channels when the corresponding sg tables are non NULL. The sg tables are embedded structs in struct spi_transfer, so they are guaranteed to be non NULL which makes the if(tx)/if(rx) tests completely bogus. The driver even sets the SPI_MASTER_MUST_RX / SPI_MASTER_MUST_TX flags which makes sure the sg tables are not only present but also non empty. Drop the tests and make the DMA path easier to follow. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
Now that the config function knows whether we are doing DMA or not we can do the necessary register setup in the config function and no longer have to do this in the trigger function. With this the trigger function becomes a no-op for DMA, so instead of testing if we are doing DMA or not in the trigger function we simply no longer call it in the DMA case. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
The watermark levels in the DMA register are write only, the driver should never have to read them back from the hardware. Replace the current _MASK and _OFFSET defines with defines taking the watermark level directly. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
This reverts patch 1476253c (spi: imx: fix ecspi mode setup) The patch tried to fix something by clearing bits in the cfg variable, but cfg is initialized to zero on function entry. There are no bits to clear. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Anton Bondarenko 提交于
DMA transfer for SPI was limited to up to 8 bits word size until now. Sync in SPI burst size and DMA bus width is necessary to correctly support 16 and 32 BPW. Signed-off-by: NAnton Bondarenko <anton.bondarenko.sama@gmail.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
There's no need for an extra dma_is_inited variable when we can equally well check for the existence of a DMA channel. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
When the MX51_ECSPI_DMA is configured we control every single bit of the register, so there's no need to read/modify/write it. Instead just write the value we want to have in the register. Also, drop unnecessary check if we are actually doing DMA. The values written to the register have no effect in PIO mode and value written there during the last DMA transfer is still in the register, so we can equally well always write a value. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sascha Hauer 提交于
The SoC specific config function does not know if DMA will be used or not. This information will be useful to configure the SPI controller correctly for DMA in following patches, so initialize the usedma variable before calling into the SoC specific config function. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 24 2月, 2016 1 次提交
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由 Sascha Hauer 提交于
At the moment the driver decides to fallback to PIO mode the buffers are already mapped for DMA. It's a bug to access them with the CPU afterwards, so we cannot just fallback to PIO mode. It should not be necessary anyway, since we only use DMA when we verified that it's possible in the fist place, so when prep_slave_sg fails it's a bug, either in the SDMA driver or in the can_dma implementation. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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