1. 09 7月, 2016 1 次提交
    • A
      powerpc/86xx: Add support for Emerson/Artesyn MVME7100 · 97493e2e
      Alessio Igor Bogani 提交于
      Add support for the Artesyn MVME7100 Single Board Computer.
      
      The MVME7100 is a 6U form factor VME64 computer with:
      
          - A two e600 cores Freescale MPC8641D CPU
          - 2 GB of DDR2 onboard memory
          - Four Gigabit Ethernets
          - Five 16550 compatible UARTs
          - One USB 2.0 port
          - Two PCI/PCI eXpress Mezzanine Card (PMC/XMC) Slots
          - A DS1375 Real Time Clock (RTC)
          - 512 KB of Non-Volatile Memory (NVRAM)
          - Two 64 KB EEPROMs
          - 128 MB NOR and 4/8 GB NAND Flash
      
      This patch is based on linux-4.7-rc1 and has been only boot tested.
      
      Limitations:
          This patch covers only models 171 and 173
          No plans to support CPLD timers
      
      Know issues:
          All four PHYs work in polling mode
      
      Configuration is missing for:
          PCI IDSEL and PCI Interrupt definition
      
      Support is missing for:
          Cache and memory controllers (which are very similar to the 85xx ones
              but right now I don't know if we can re-use their support)
          Watchdog, USB, NVRAM, NOR, NAND, EEPROMs, VME, PMC/XMC and RTC
      Signed-off-by: NAlessio Igor Bogani <alessio.bogani@elettra.eu>
      Signed-off-by: NScott Wood <oss@buserror.net>
      97493e2e
  2. 12 3月, 2016 1 次提交
  3. 17 3月, 2012 3 次提交
  4. 19 3月, 2009 1 次提交
  5. 29 1月, 2009 1 次提交
  6. 04 12月, 2008 1 次提交
    • M
      powerpc/86xx: Basic GPIO support for GE Fanuc SBC610 · 965dc5fc
      Martyn Welch 提交于
      Basic support for the GPIO available on the SBC610 VPX Single Board Computer
      from GE Fanuc (PowerPC MPC8641D).
      
      This patch adds basic support for the GPIO in the devices I/O FPGA, the GPIO
      functionality is exposed through the AFIX pins on the backplane, unless used
      by an AFIX card.
      
      This code currently does not support switching between totem-pole and
      open-drain outputs (when used as outputs, GPIOs default to totem-pole).
      The interrupt capabilites of the GPIO lines is also not currently supported.
      Signed-off-by: NMartyn Welch <martyn.welch@gefanuc.com>
      Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
      965dc5fc
  7. 14 10月, 2008 1 次提交
  8. 16 9月, 2008 1 次提交
  9. 14 7月, 2008 1 次提交
  10. 17 4月, 2008 1 次提交
  11. 08 10月, 2007 1 次提交
  12. 23 7月, 2007 1 次提交
  13. 27 3月, 2007 1 次提交
  14. 28 6月, 2006 1 次提交
  15. 21 6月, 2006 1 次提交