cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: NZhao Qiang <qiang.zhao@nxp.com>
Acked-by: Rob Herring<robh@kernel.org>
Signed-off-by: NScott Wood <oss@buserror.net>

RCPM is the Run Control and Power Management module performs all
device-level tasks associated with device run control and power
management.

Add this for freescale powerpc platform and layerscape platform.
Signed-off-by: NChenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: NWang Dongsheng <dongsheng.wang@freescale.com>
[scottwood: s/pointer/phandle and "disabled" status from example]
Signed-off-by: NScott Wood <oss@buserror.net>

It turns out that existing U-Boots will dereference NULL pointers
if the device tree does not have cell-index in the portal nodes.

No patch has yet been merged adding device tree nodes for this binding
(except a dtsi that has not yet been referenced), nor has any driver
yet been merged making use of the binding, so it's not too late to
change the binding in order to keep compatibility with existing
U-Boots.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Cc: Madalin-Cristian Bucur <madalin.bucur@freescale.com>

This supports SoC(s) with multiple B/QMan instances
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

'ranges' are specified as <base size> not as <start end>
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: NScott Wood <scottwood@freescale.com>

Portals are memory mapped interfaces to QMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the QMan
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Change-Id: I29764fa8093b5ce65460abc879446795c50d7185
Signed-off-by: NScott Wood <scottwood@freescale.com>

The Queue Manager is part of the Data-Path Acceleration Architecture
(DPAA).  QMan supports queuing and QoS scheduling of frames to CPUs,
network interfaces and DPAA logic modules, maintains packet ordering
within flows.  Besides providing flow-level queuing, is also
responsible for congestion management functions such as RED/WRED,
congestion notifications and tail discards.  This binding covers the
CCSR space programming model
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Change-Id: I3acb223893e42003d6c9dc061db568ec0b10d29b
Signed-off-by: NScott Wood <scottwood@freescale.com>

Portals are memory mapped interfaces to BMan that allow low-latency,
lock-less interaction by software running on processor cores,
accelerators and network interfaces with the BMan
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95
Signed-off-by: NScott Wood <scottwood@freescale.com>

The Buffer Manager is part of the Data-Path Acceleration Architecture
(DPAA).  BMan supports hardware allocation and deallocation of buffers
belonging to pools originally created by software with configurable
depletion thresholds.  This binding covers the CCSR space programming
model
Signed-off-by: NEmil Medve <Emilian.Medve@Freescale.com>
Change-Id: I3ec479bfb3c91951e96902f091f5d7d2adbef3b2
Signed-off-by: NScott Wood <scottwood@freescale.com>