1. 22 11月, 2012 3 次提交
  2. 26 10月, 2012 2 次提交
  3. 24 10月, 2012 1 次提交
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      drm/i915: clear the entire sdvo infoframe buffer · b6e0e543
      Daniel Vetter 提交于
      Like in the case of native hdmi, which is fixed already in
      
      commit adf00b26
      Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Date:   Tue Sep 25 13:23:34 2012 -0300
      
          drm/i915: make sure we write all the DIP data bytes
      
      we need to clear the entire sdvo buffer to avoid upsetting the
      display.
      
      Since infoframe buffer writing is now a bit more elaborate, extract it
      into it's own function. This will be useful if we ever get around to
      properly update the ELD for sdvo. Also #define proper names for the
      two buffer indexes with fixed usage.
      
      v2: Cite the right commit above, spotted by Paulo Zanoni.
      
      v3: I'm too stupid to paste the right commit.
      
      v4: Ben Hutchings noticed that I've failed to handle an underflow in
      my loop logic, breaking it for i >= length + 8. Since I've just lost C
      programmer license, use his solution. Also, make the frustrated 0-base
      buffer size a notch more clear.
      Reported-and-tested-by: NJürg Billeter <j@bitron.ch>
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=25732
      Cc: stable@vger.kernel.org
      Cc: Paulo Zanoni <przanoni@gmail.com>
      Cc: Ben Hutchings <ben@decadent.org.uk>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b6e0e543
  4. 16 10月, 2012 2 次提交
  5. 03 10月, 2012 2 次提交
  6. 06 9月, 2012 8 次提交
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      drm/i915: improve modeset state checking after dpms calls · b980514c
      Daniel Vetter 提交于
      Now that we have solid modeset state tracking and checking code in
      place, we can do the Full Monty also after dpms calls.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b980514c
    • D
      drm/i915: s/intel_encoder_disable/intel_encoder_noop · 1f703855
      Daniel Vetter 提交于
      Because that's what it is. Unfortunately we can't rip this out because
      the fb helper has an incetious relationship with the crtc helper - it
      likes to call disable_unused_functions, among other things.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1f703855
    • D
      drm/i915: check connector hw/sw state · 0a91ca29
      Daniel Vetter 提交于
      Atm we can only check the connector state after a dpms call - while
      doing modeset with the copy&pasted crtc helper code things are too
      ill-defined for proper checking. But the idea is very much to call
      this check from the modeset code, too.
      
      v2: Fix dpms check and don't presume that if the hw isn't on that it
      must not be linked up with an encoder (it could simply be switched off
      with the dpms state).
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      0a91ca29
    • D
      drm/i915/sdvo: implement get_hw_state · 4ac41f47
      Daniel Vetter 提交于
      SDVO is the first real special case - we support multiple outputs on
      the same encoder and the encoder dpms state isn't the same as when
      just disabling the outputs when the encoder is cloned.
      
      Hence we need a real connector get_hw_state function which inquires
      the sdvo encoder about its active outputs.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4ac41f47
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      drm/i915: rip out encoder->prepare/commit · c9deac97
      Daniel Vetter 提交于
      With the new infrastructure we're doing this when enabling/disabling
      the entire display pipe.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c9deac97
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      drm/i915: copy&paste drm_crtc_helper_set_mode · a6778b3c
      Daniel Vetter 提交于
      Together with the static helper functions drm_crtc_prepare_encoders
      and drm_encoder_disable (which will be simplified in the next patch,
      but for now are 1:1 copies). Again, no changes beside new names for
      these functions.
      
      Also call our new set_mode instead of the crtc helper one now in all
      the places we've done so far.
      
      v2: Call the function just intel_set_mode to better differentia it
      from intel_crtc_mode_set which really only does the ->mode_set step of
      the entire modeset sequence on one crtc. Whereas this function does
      the global change.
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      a6778b3c
    • D
      drm/i915: convert dpms functions of dvo/sdvo/crt · b2cabb0e
      Daniel Vetter 提交于
      Yeah, big patch but I couldn't come up with a neat idea of how to
      split it up further, that wouldn't break dpms on cloned configs
      somehow. But the changes in dvo/sdvo/crt are all pretty much
      orthonogal, so it's not too bad a patch.
      
      These are the only encoders that support cloning, which requires a few
      special changes compared to the previous patches.
      - Compute the desired state of the display pipe by walking all
        connected encoders and checking whether any has active connectors.
        To make this clearer, drop the old mode parameter to the crtc dpms
        function and rename it to intel_crtc_update_dpms.
      - There's the curious case of intel_crtc->dpms_mode. With the previous
        patches to remove the overlay pipe A code and to rework the load
        detect pipe code, the big users are gone. We still keep it to avoid
        enabling the pipe twice, but we duplicate this logic with
        crtc->active, too. Still, leave this for now and just push a fake
        dpms mode into it that reflects the state of the display pipe.
      
      Changes in the encoder dpms functions:
      - We clamp the dpms state to the supported range right away. This is
        escpecially important for the VGA outputs, where only older hw
        supports the intermediate states. This (and the crt->adpa_reg patch)
        allows us to unify the crt dpms code again between all variants
        (gmch, vlv and pch).
      - We only enable/disable the output for dvo/sdvo and leave the encoder
        running. The encoder will be disabled/enabled when we switch the
        state of the entire output pipeline (which will happen right away
        for non-cloned setups). This way the duplication is reduced and
        strange interaction when disabling output ports at the wrong time
        avoided.
      
      The dpms code for all three types of connectors contains a bit of
      duplicated logic, but I think keeping these special cases separate is
      simpler: CRT is the only one that hanldes intermediate dpms state
      (which requires extra logic to enable/disable things in the right
      order), and introducing some abstraction just to share the code
      between dvo and sdvo smells like overkill. We can do that once someone
      bothers to implement cloning for the more modern outputs. But I doubt
      that this will ever happen.
      
      v2: s/crtc/crt/_set_dpms, noticed by Paulo Zanoni.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b2cabb0e
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      drm/i915/sdvo: convert to encoder disable/enable · ce22c320
      Daniel Vetter 提交于
      Similar to crt, this doesn't convert the dpms functions.
      Also similar to crt, we don't switch of the display pipe
      for the intermediate modes, only DPMS_OFF is truely off.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ce22c320
  7. 03 9月, 2012 3 次提交
  8. 24 8月, 2012 2 次提交
  9. 17 8月, 2012 1 次提交
  10. 26 7月, 2012 2 次提交
    • A
      0274df3e
    • D
      drm/i915: simplify possible_clones computation · 66a9278e
      Daniel Vetter 提交于
      Intel hw only has one MUX for encoders, so outputs are either not
      cloneable or all in the same group of cloneable outputs. This neatly
      simplifies the code and allows us to ditch some ugly if cascades in
      the dp and hdmi init code (well, we need these if cascades for other
      stuff still, but that can be taken care of in follow-up patches).
      
      Note that this changes two things:
      - dvo can now be cloned with sdvo, but dvo is gen2 whereas sdvo is
        gen3+, so no problem. Note that the old code had a bug and didn't
        allow cloning crt with dvo (but only the other way round).
      - sdvo-lvds can now be cloned with sdvo-non-tv. Spec says this won't
        work, but the only reason I've found is that you can't use the
        panel-fitter (used for lvds upscaling) with anything else. But we
        don't use the panel fitter for sdvo-lvds. Imo this part of Bspec is
        a) rather confusing b) mostly as a guideline to implementors (i.e.
        explicitly stating what is already implicit from the spec, without
        always going into the details of why). So I think we can ignore this
        - worst case we'll get a bug report from a user with with sdvo-lvds
        and sdvo-tmds and have to add that special case back in.
      
      Because sdvo lvds is a bit special explain in comments why sdvo LVDS
      outputs can be cloned, but native LVDS and eDP can't be cloned - we
      use the panel fitter for the later, but not for sdvo.
      
      Note that this also uncoditionally initializes the panel_vdd work used
      by eDP. Trying to be clever doesn't buy us anything (but strange bugs)
      and this way we can kill the is_edp check.
      
      v2: Incorporate review from Paulo
      - Add in a missing space.
      - Pimp comment message to address his concerns.
      Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      66a9278e
  11. 20 7月, 2012 1 次提交
  12. 31 5月, 2012 1 次提交
  13. 24 5月, 2012 1 次提交
  14. 22 5月, 2012 3 次提交
  15. 20 5月, 2012 1 次提交
    • D
      drm/i915: fixup infoframe support for sdvo · 81014b9d
      Daniel Vetter 提交于
      At least the worst offenders:
      - SDVO specifies that the encoder should compute the ecc. Testing also
        shows that we must not send the ecc field, so copy the dip_infoframe
        struct to a temporay place and avoid the ecc field. This way the avi
        infoframe is exactly 17 bytes long, which agrees with what the spec
        mandates as a minimal storage capacity (with the ecc field it would
        be 18 bytes).
      - Only 17 when sending the avi infoframe. The SDVO spec explicitly
        says that sending more data than what the device announces results
        in undefined behaviour.
      - Add __attribute__((packed)) to the avi and spd infoframes, for
        otherwise they're wrongly aligned. Noticed because the avi infoframe
        ended up being 18 bytes large instead of 17. We haven't noticed this
        yet because we don't use the uint16_t fields yet (which are the only
        ones that would be wrongly aligned).
      
      This regression has been introduce by
      
      3c17fe4b is the first bad commit
      commit 3c17fe4b
      Author: David Härdeman <david@hardeman.nu>
      Date:   Fri Sep 24 21:44:32 2010 +0200
      
          i915: enable AVI infoframe for intel_hdmi.c [v4]
      
      Patch tested on my g33 with a sdvo hdmi adaptor.
      
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=25732
      Tested-by: Peter Ross <pross@xvid.org> (G35 SDVO-HDMI)
      Reviewed-by: NEugeni Dodonov <eugeni.dodonov@intel.com>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      81014b9d
  16. 07 5月, 2012 1 次提交
  17. 04 5月, 2012 2 次提交
    • D
      drm/i915: use mode values consistently when converting to sdvo dtd · c6ebd4c0
      Daniel Vetter 提交于
      The drm_mode->dtd conversion used the crtc timings, whereas the
      dtd->drm_mod did not set these. Use the standard mode information, not
      the crtc timings, in both cases to make these two functions proper
      inverses of each another.
      
      Note that this also kills the risk that we handle interlaced timings
      inconsistently because the drm core uses half-frames for crtc timings,
      whereas we need full frames. But interlaced support is pretty decently
      broken anyway for sdvo encoders, so no big deal.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c6ebd4c0
    • D
      drm/i915: rip out unnecessary calls to drm_mode_set_crtcinfo · f7bacf19
      Daniel Vetter 提交于
      Our handling of the crtc timing computation has been nicely
      cargo-culted with calls to drm_mode_set_crtcinfo sprinkled all over
      the place. But with
      
      commit f9bef081
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sun Apr 15 19:53:19 2012 +0200
      
          drm/i915: don't clobber the special upscaling lvds timings
      
      and
      
      commit ca9bfa7e
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sat Jan 28 14:49:20 2012 +0100
      
          drm/i915: fixup interlaced vertical timings confusion, part 1
      
      we now only set the crtc timing fields in the encoder->mode_fixup
      (lvds only) and in crtc->mode_fixup (for everyone else). And since
      
      commit 75c13993
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sat Jan 28 23:48:46 2012 +0100
      
          drm/i915: fixup overlay checks for interlaced modes
      
      the only places we actually need the crtc timings is in the mode_set
      function.
      
      I guess the idea of the drm core is that every time it creates a drm
      mode, it also sets the timings. But afaics it never uses them, safe
      for the precise vblank timestamp code (but that can only run on active
      modes, i.e.  after our mode_fixup functions have been called). The
      problem is that drm core always sets CRTC_INTERLACE_HALVE_V, so the
      timings are pretty much bogus for us anyway (at least with interlaced
      support).
      
      So I guess it's the drivers job that every active modes needs to have
      crtc timings that suits it, and with these patches we should have
      that. drm core doesn't seem to care about modes that just get passed
      around. Hence we can now safely rip out all the remaining calls to
      set_crtcinfo left in the driver and clean up this confusion.
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      f7bacf19
  18. 27 4月, 2012 1 次提交
    • D
      drm/i915: handle input/output sdvo timings separately in mode_set · 6651819b
      Daniel Vetter 提交于
      We seem to have a decent confusion between the output timings and the
      input timings of the sdvo encoder. If I understand the code correctly,
      we use the original mode unchanged for the output timings, safe for
      the lvds case. And we should use the adjusted mode for input timings.
      
      Clarify the situation by adding an explicit output_dtd to the sdvo
      mode_set function and streamline the code-flow by moving the input and
      output mode setting in the sdvo encode together.
      
      Furthermore testing showed that the sdvo input timing needs the
      unadjusted dotclock, the sdvo chip will automatically compute the
      required pixel multiplier to get a dotclock above 100 MHz.
      
      Fix this up when converting a drm mode to an sdvo dtd.
      
      This regression was introduced in
      
      commit c74696b9
      Author: Pavel Roskin <proski@gnu.org>
      Date:   Thu Sep 2 14:46:34 2010 -0400
      
          i915: revert some checks added by commit 32aad86f
      
      particularly the following hunk:
      
      diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
      b/drivers/gpu/drm/i915/intel_sdvo.c
      index 093e914..62d22ae 100644
      --- a/drivers/gpu/drm/i915/intel_sdvo.c
      +++ b/drivers/gpu/drm/i915/intel_sdvo.c
      @@ -1122,11 +1123,9 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
      
           /* We have tried to get input timing in mode_fixup, and filled into
              adjusted_mode */
      -    if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
      -        intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
      +    intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
      +    if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
               input_dtd.part2.sdvo_flags = intel_sdvo->sdvo_flags;
      -    } else
      -        intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
      
           /* If it's a TV, we already set the output timing in mode_fixup.
            * Otherwise, the output timing is equal to the input timing.
      
      Due to questions raised in review, below a more elaborate analysis of
      the bug at hand:
      
      Sdvo seems to have two timings, one is the output timing which will be
      sent over whatever is connected on the other side of the sdvo chip (panel,
      hdmi screen, tv), the other is the input timing which will be generated by
      the gmch pipe. It looks like sdvo is expected to scale between the two.
      
      To make things slightly more complicated, we have a bunch of special
      cases:
      - For lvds panel we always use a fixed output timing, namely
        intel_sdvo->sdvo_lvds_fixed_mode, hence that special case.
      - Sdvo has an interface to generate a preferred input timing for a given
        output timing. This is the confusing thing that I've tried to clear up
        with the follow-on patches.
      - A special requirement is that the input pixel clock needs to be between
        100MHz and 200MHz (likely to keep it within the electromechanical design
        range of PCIe), 270MHz on later gen4+. Lower pixel clocks are
        doubled/quadrupled.
      
      The thing this patch tries to fix is that the pipe needs to be
      explicitly instructed to double/quadruple the pixels and needs the
      correspondingly higher pixel clock, whereas the sdvo adaptor seems to
      do that itself and needs the unadjusted pixel clock. For the sdvo
      encode side we already set the pixel mutliplier with a different
      command (0x21).
      
      This patch tries to fix this mess by:
      - Keeping the output mode timing in the unadjusted plain mode, safe
        for the lvds case.
      - Storing the input timing in the adjusted_mode with the adjusted
        pixel clock. This way we don't need to frob around with the core
        crtc mode set code.
      - Fixing up the pixelclock when constructing the sdvo dtd timing
        struct. This is why the first hunk of the patch is an integral part
        of the series.
      - Dropping the is_tv special case because input_dtd is equivalent to
        adjusted_mode after these changes. Follow-up patches clear this up
        further (by simply ripping out intel_sdvo->input_dtd because it's
        not needed).
      
      v2: Extend commit message with an in-depth bug analysis.
      Reported-and-Tested-by: NBernard Blackham <b-linuxgit@largestprime.net>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48157Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Cc: stable@kernel.org
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      6651819b
  19. 18 4月, 2012 2 次提交
  20. 10 4月, 2012 1 次提交