- 16 11月, 2016 1 次提交
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 21 10月, 2016 2 次提交
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Kevin Hilman 提交于
Add binding and basic support for the SD/eMMC controller on Amlogic S905/GXBB devices. Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NKevin Hilman <khilman@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> [narmstrong: added nodes for GX, enabled SDIO on P20x] Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 19 10月, 2016 1 次提交
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由 Neil Armstrong 提交于
For boards only supporting 10/100 ethernet over a RMII PHY link, add a separate pinctrl node. By the way, rename the existing node to rgmii specific naming in all boards dts. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 18 10月, 2016 1 次提交
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由 Neil Armstrong 提交于
Move all non-gxbb specific nodes to a common GX dtsi. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 15 9月, 2016 10 次提交
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由 Marc Zyngier 提交于
The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for the corresponding ARM CPUs clearly shows that this is wrong, and I've corrected those. For non-ARM designs (and in the absence of a publicly available TRM), I've made them active low as well, which can't be completely wrong as the GIC cannot disinguish between level low and level high. The respective maintainers are of course welcome to prove me wrong. While I was at it, I took the liberty to fix a couple of related issue, such as some spurious affinity bits on ThunderX, and their complete absence on ls1043a (both of which seem to be related to copy-pasting from other DTs). Acked-by: NDuc Dang <dhdang@apm.com> Acked-by: NCarlo Caione <carlo@endlessm.com> Acked-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: NDinh Nguyen <dinguyen@opensource.altera.com> Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Martin Blumenstingl 提交于
Add the nodes for the dwc2 USB controller and the related USB PHYs. Currently we force usb0 to host mode because OTG is currently not working in our PHY driver. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
This is used to configure the pins of the sd_emmc_a controller to which an SDIO module is connected (when available). Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Tested-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Jerome Brunet 提交于
Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Martin Blumenstingl 提交于
The Amlogic reference driver uses the "mc_val" devicetree property to configure the PRG_ETHERNET_ADDR0 register. Unfortunately it uses magic values for this configuration. According to the datasheet the PRG_ETHERNET_ADDR0 register is at address 0xc8834108. However, the reference driver uses 0xc8834540 instead. According to my tests, the value from the reference driver is correct. No changes are required to the board dts files because the only required configuration option is the phy-mode, which had to be configured correctly before as well. Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Tested-by: NJérôme Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 02 9月, 2016 6 次提交
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由 Carlo Caione 提交于
Add the NVMEM device node in the DTSI. Signed-off-by: NCarlo Caione <carlo@endlessm.com> [khilman: dropped driver cleanup hunk] Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Carlo Caione 提交于
Add the secure monitor node in the Amlogic Meson GXBB DTSI file to enable it. Signed-off-by: NCarlo Caione <carlo@endlessm.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Kevin Hilman 提交于
Add DT nodes for PWMs in EE and AO domains. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com>
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由 Neil Armstrong 提交于
This adds the Infrared Remote Controller node so boards with an IR remote can simply enable it. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Kevin Hilman 提交于
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Neil Armstrong 提交于
Add the AO clock controller node for the AmLogic GXBB SoC. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 18 8月, 2016 1 次提交
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由 Kevin Hilman 提交于
With the clock driver upstream, switch to the real clock. Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 16 8月, 2016 1 次提交
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 07 7月, 2016 1 次提交
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由 Arnd Bergmann 提交于
This reverts commit f3abd629, which caused a build regression: arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi:48:41: fatal error: dt-bindings/clock/gxbb-clkc.h: No such file or directory We should apply this patch one merge window later, once the clk branch is merged as well. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 24 6月, 2016 2 次提交
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由 Kevin Hilman 提交于
With the clock driver upstream, switch to the real clock. Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Michael Turquette 提交于
Add the clock controller node for the AmLogic GXBB machine. Signed-off-by: NMichael Turquette <mturquette@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 15 6月, 2016 1 次提交
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由 Neil Armstrong 提交于
Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 02 6月, 2016 6 次提交
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由 Neil Armstrong 提交于
Update DTSI file to add the reset controller node. Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Kevin Hilman 提交于
Add node for ethernet interface and pinctrl pins. Enable on odroid-C2 and P20x boards. Acked-by: NCarlo Caione <carlo@endlessm.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Kevin Hilman 提交于
Add DT nodes for additional UARTs (UART B & C in EE domain) and add pins for all EE domain UARTs. Acked-by: NCarlo Caione <carlo@endlessm.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Kevin Hilman 提交于
Acked-by: NCarlo Caione <carlo@endlessm.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Carlo Caione 提交于
Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2. Signed-off-by: NCarlo Caione <carlo@endlessm.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Carlo Caione 提交于
Add two new buses in the DTS: hiu and periphs buses. In the Amlogic S905/GXBB SoC several devices (clock / eth / pin controllers, etc...) are mapped under these two buses. Add them in the DT before starting to add new devices. Signed-off-by: NCarlo Caione <carlo@endlessm.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 31 3月, 2016 1 次提交
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由 Kevin Hilman 提交于
Apparently, it's not valid to have an alias point to a disabled device. Fix this by moving the aliases that are used (serial0) into the files that use them, and remove aliases to disabled devices (serial1). Suggested-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKevin Hilman <khilman@baylibre.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 07 3月, 2016 1 次提交
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NCarlo Caione <carlo@endlessm.com>
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