There should be no nodes that are not children of the mbus. Move
the nand node under the mbus, and rework the board .dts files
to use an & reference to the nand node.
Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

There should be no nodes that are not children of the mbus. Move
the crypto node under the mbus.
Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

kirkwood_setup_wins is the last manual caller of mbus in kirkwood, don't
call it for DT boards and rely on the DT having a mbus node with
a proper ranges property to setup these windows.

Move all the mbus ranges properties for all boards into kirkwood.dtsi,
since they are currently all the same.

This makes the DT self consistent, since the physical address of the
NAND and CRYPTO are both referenced internally. The arbitary Linux
constants KIRKWOOD_NAND_MEM_PHYS_BASE and KIRKWOOD_SRAM_PHYS_BASE
no longer have to match the DT values.
Signed-off-by: NJason Gunthorpe <jgunthorpe@obsidianresearch.com>
Acked-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This adds an initial DT file for the Globalscale D3Plug with Dove SoC.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This adds a node for the pcie controllers found on Dove SoCs to the
SoC DT include.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

With mbus node in place, now relocate all internal device nodes
to internal-regs node with proper address ranges.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This adds a MBus node including ranges and pcie apertures required later.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This adds a macro used for defining address window's target ID and
attribute cells for the MBus ranges entry.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This coverts Dove DT board files to preprocessor includes instead
of dtc includes.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

This commit adjusts the Armada 370 and Armada XP PCIe controllers
Device Tree informations to reference their MSI controller. In the
case of this platform, the MSI controller is implemented by the MPIC.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: NDaniel Price <daniel.price@gmail.com>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

Adds the 'msi-controller' property to the main interrupt controller
Device Tree node, to indicate that it can now behave as a MSI
controller.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: NThierry Reding <thierry.reding@gmail.com>
Tested-by: NDaniel Price <daniel.price@gmail.com>
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The mv64xxx-i2c embedded in the Armada XP have a new feature to
offload i2c transaction. This new version of the IP come also with
some errata. This lead to the introduction to a another compatible
string.

This commit split the i2c information into armada-370.dtsi and
armada-xp.dtsi. Most of the data remains the same and stay in the
common file Armada-370-xp.dtsi. With this new feature the size of the
registers are bigger for Armada XP and the new compatible string is
used.
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NJason Cooper <jason@lakedaemon.net>

The A20-olinuxino-micro has the EMAC wired in. Enable it in the DT so
that we can use it.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The Cubieboard2, just like its A10 counterpart, has the Ethernet wired
in. Enable it in the DT.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The A20 has several muxing options for the EMAC. Yet, the currently
supported boards only use one set of them. Add that pin set to the DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The Allwinner A20 SoC also have the EMAC found on the A10 and A10s.
Enable the support for it in the DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Since pwm-samsung bindings require at least one clock to be specified,
this patch adds the missing clocks and clock-names properties to specify
clocks used by PWM block on Exynos4 SoCs.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Replace the numerical polarity flags with the PWM_POLARITY_INVERTED
symbolic constant.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The Versatile Express V2P-CA15_A7 (aka TC2) has a CCI-400 which is
needed to get Multi-Cluster Power Management (MCPM) working.
Signed-off-by: NJon Medhurst <tixy@linaro.org>
Acked-by: NPawel Moll <pawel.moll@arm.com>
Acked-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the
DW APB timer, just fed by different clocks. Thus, deprecate both
"dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer".
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
CC: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
CC: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
CC: Jamie Iles <jamie@jamieiles.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NOlof Johansson <olof@lixom.net>

v3:
- Split out a separate that cleans up the timer entries and clock information.
- Clearly states which binding is deprecated in the bindings doc.

v2:
- Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain
  backwards compatibility in the driver.

Fix phy0 address to match the reg property defined in phy0 node.
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Let's follow the ratified DT binding and use uartdm instead of
hsuart. This does break backwards compatibility but this
shouldn't be a problem because the uart driver isn't probing on
these devices without adding clock support (which isn't merged so
far).

Cc: David Brown <davidb@codeaurora.org>
Acked-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

So I assumed that Beagle bone has only one USB port in host mode because
the micro USB connector had an USB-UART there. I was wrong a little. The
second port runs on host mode, but the micro USB plug is connected to an
internal HUB with two ports: one to the USB-UART and one to musb
instance one.
For that reason, this patch enables both ports: the primary in device
mode only and the second in host mode only.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This is what I observe:
On the first connect, the musb starts with DEVCTL.Session set. On
disconnect, musb_core calls try_idle. That functions removes the Session
bit signalizing that the session is over (something that only in OTG is
required). A new device, that is plugged, is no longer recognized.
I've setup a timer and checked the DEVCTL register and I haven't seen a
change in VBus and I saw the B-Device bit set. After setting the IDDIG
into A mode and forcing the device to behave like a A device, I didn't
see a change.
Neither VBUS goes to 0b11 nor does a session start request comes.
In the TI-v3.2 kernel they skip to call musb_platform_try_idle() in the
OTG_STATE_A_WAIT_BCON state while not in OTG mode.
Since the second port hast a standard A plug the patch changes the port
to run in host mode only and skips the timer which would remove
DEVCTL.Session so we can reconnect to another device later.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This relfects the code and dts requires changes due to recent .dts
binding updates:
- use mg prefix for the Metor Graphics specific attributes
- use power in mA not in mA/2 as specifed in the USB2.0 specification
- remove the child node for USB. This is driver specific on won't be
  reflected in the device tree
- use the "mentor" prefix instead of "mg".
- use "dr_mode" istead of "mg,port-mode" for the port mode. The former
  is used by a few other drivers.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

I forgot to separete the different names in the reg-names property. This
didn't cause anything to fail because the driver does not use the names
and simply relies on the order of the memory offsets in reg.
This patch fixes this in case it is used later.
Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>

This patch describe the phy used on atmel sama5d3 mother board:
 - phy address
 - phy interrupt pin
Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Now that the clock driver knows about the available clocks found on the
A20, we can build up the clock tree from the device tree.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

Now that the clock driver has support for the A31 clocks, we can add
them to the DTSI and start using them in the relevant hardware blocks.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

The A10s has only a subset of the A10 gates. Now that the clock driver
has support for this gates set, switch to it in the DTSI.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: NEmilio López <emilio@elopez.com.ar>

Add ADC device tree node for exynos5420 and exynos5250
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds RTC DT node to Exynos5420 SoC
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Moves the RTC DT node's "status" property from exynos5250 board
(arndale & snow) dts files to exynos5250.dtsi, since the bindings
in exynos5250.dtsi depicts the RTC h/w completely.
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fixes the RTC DT node name for Exynos5250 as per the DT node naming
convention.
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

the old codes defined uart0_nostreamctrl_pins, but missed pingroup
and padmux definition for it. this patch fixes it.
Signed-off-by: NQipan Li <Qipan.Li@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NJosh Wu <josh.wu@atmel.com>

Signed-off-by: NJosh Wu <josh.wu@atmel.com>

The NFC driver code doesn't use atmel,has-nfc and atmel,use-nfc-sram.
Signed-off-by: NJosh Wu <josh.wu@atmel.com>

enable i2c0 device on Vybrid VF610 Tower Board
Signed-off-by: NJingchang Lu <b35083@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This adds one more I2C2 alternate pinmux entry.
GPIO1_2 <=> SCL
GPIO1_3 <=> SDA
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>