1. 27 2月, 2014 6 次提交
  2. 09 2月, 2014 11 次提交
  3. 15 1月, 2014 7 次提交
  4. 05 1月, 2014 3 次提交
    • M
      crypto: drivers - Sort drivers/crypto/Makefile · d16b8700
      Marek Vasut 提交于
      The order in the Makefile was a mess, sort it.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      d16b8700
    • M
      crypto: mxs - Add Freescale MXS DCP driver · 15b59e7c
      Marek Vasut 提交于
      Add support for the MXS DCP block. The driver currently supports
      SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
      CRC32 is not yet supported.
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: devicetree@vger.kernel.org
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      15b59e7c
    • M
      crypto: mxs - Remove the old DCP driver · c493c044
      Marek Vasut 提交于
      Remove the old DCP driver as it had multiple severe issues. The driver
      will be replaced by a more robust implementation. Here is a short list
      of problems with this driver:
      
      1) It only supports AES_CBC
      2) The driver was apparently never ran behind anyone working with MXS. ie.:
         -> Restarting the DCP block is not done via mxs_reset_block()
         -> The DT name is not "fsl,dcp" or "fsl,mxs-dcp" as other MXS drivers
      3) Introduces new ad-hoc IOCTLs
      4) The IRQ handler can't use usual completion() in the driver because that'd
         trigger "scheduling while atomic" oops, yes?
      Signed-off-by: NMarek Vasut <marex@denx.de>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c493c044
  5. 01 1月, 2014 1 次提交
  6. 30 12月, 2013 3 次提交
  7. 20 12月, 2013 5 次提交
    • H
      crypto: caam - simplify and harden key parsing · 4e6e0b27
      Horia Geanta 提交于
      Use the common helper function crypto_authenc_extractkeys() for key
      parsing.
      Also fix the key buffer overflow condition: use split key pad length
      instead of authentication key length.
      Signed-off-by: NHoria Geanta <horia.geanta@freescale.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      4e6e0b27
    • L
      crypto: omap-sham - Fix Polling mode for larger blocks · acef7b0f
      Lokesh Vutla 提交于
      Command "tcrypt sec=1 mode=403" give the follwoing error for Polling
      mode:
      root@am335x-evm:/# insmod tcrypt.ko sec=1 mode=403
      [...]
      
      [  346.982754] test 15 ( 4096 byte blocks, 1024 bytes per update,   4 updates):   4352 opers/sec,  17825792 bytes/sec
      [  347.992661] test 16 ( 4096 byte blocks, 4096 bytes per update,   1 updates):   7095 opers/sec,  29061120 bytes/sec
      [  349.002667] test 17 ( 8192 byte blocks,   16 bytes per update, 512 updates):
      [  349.010882] Unable to handle kernel NULL pointer dereference at virtual address 00000000
      [  349.020037] pgd = ddeac000
      [  349.022884] [00000000] *pgd=9dcb4831, *pte=00000000, *ppte=00000000
      [  349.029816] Internal error: Oops: 17 [#1] PREEMPT SMP ARM
      [  349.035482] Modules linked in: tcrypt(+)
      [  349.039617] CPU: 0 PID: 1473 Comm: insmod Not tainted 3.12.4-01566-g6279006-dirty #38
      [  349.047832] task: dda91540 ti: ddcd2000 task.ti: ddcd2000
      [  349.053517] PC is at omap_sham_xmit_dma+0x6c/0x238
      [  349.058544] LR is at omap_sham_xmit_dma+0x38/0x238
      [  349.063570] pc : [<c04eb7cc>]    lr : [<c04eb798>]    psr: 20000013
      [  349.063570] sp : ddcd3c78  ip : 00000000  fp : 9d8980b8
      [  349.075610] r10: 00000000  r9 : 00000000  r8 : 00000000
      [  349.081090] r7 : 00001000  r6 : dd898000  r5 : 00000040  r4 : ddb10550
      [  349.087935] r3 : 00000004  r2 : 00000010  r1 : 53100080  r0 : 00000000
      [  349.094783] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
      [  349.102268] Control: 10c5387d  Table: 9deac019  DAC: 00000015
      [  349.108294] Process insmod (pid: 1473, stack limit = 0xddcd2248)
      
      [...]
      
      This is because polling_mode is not enabled for ctx without FLAGS_FINUP.
      
      For polling mode the bufcnt is made 0 unconditionally. But it should be made 0
      only if it is a final update or a total is not zero(This condition is similar
      to what is done in DMA case). Because of this wrong hashes are produced.
      
      Fixing the same.
      Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      acef7b0f
    • T
      crypto: ccp - Remove user triggerable pr_err calls · 369f3dab
      Tom Lendacky 提交于
      Remove the pr_err calls that are issued during parameter
      checking in some AES operations. This will eliminate the
      possibility of filling up syslog through these paths.
      Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      369f3dab
    • T
      crypto: ccp - CCP Kconfig fixes · d5aa8095
      Tom Lendacky 提交于
      Update the Kconfig to include PCI on the 'depends on'
      and add 'select HW_RANDOM' to insure the necessary PCI
      and HW_RANDOM functions are available/included in the
      build.
      Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      d5aa8095
    • T
      crypto: ccp - Fix sparse warnings in ccp-crypto-sha.c · 6f0be9b2
      Tom Lendacky 提交于
      The sha initialization data generated the following sparse warnings:
      
         sparse: incorrect type in initializer (different base types)
            expected unsigned int
            got restricted __be32 [usertype] <noident>
      
      Change the initialization data type from u32 to __be32.
      Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      6f0be9b2
  8. 13 12月, 2013 4 次提交