If enabling the hsmci regulator on card detection, the board can reboot
on sd card insertion. Keeping the regulator always enabled fixes this
issue.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Fixes: 8d545f32 ("ARM: at91/dt: sama5d4 xplained: add regulators for v(q)mmc1 supplies")
Cc: stable@vger.kernel.org #4.3 and later
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

If enabling the hsmci regulator on card detection, the board can reboot
on sd card insertion. Keeping the regulator always enabled fixes this
issue.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Fixes: 1b53e341 ("ARM: at91/dt: sama5d3 xplained: add fixed regulator for vmmc0")
Cc: stable@vger.kernel.org #4.3 and later
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This will be needed for UniPhier PH1-LD11 and PH1-LD20 SoCs.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

Just for consistent coding style.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Initial commit for PH1-Pro4 Sanji board support.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Initial commit for PH1-Pro4 Ace board support.

Note:
There are two variants for the amount of DDR memory; 1GB or 2GB.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This is used for on-board inter-connection.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This board has an EEPROM (STMicroelectronics M24C64-WMN6TP) connected
to the I2C channel 0 of the SoC.  Its slave address is 0x54.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

During the review process of the UniPhier System Bus driver
(drivers/bus/uniphier.c), the current binding of the System Bus
Controller turned out to be no good.  In order to make the driver
really usable, we have to switch over to the new binding defined by
Documentation/devicetree/bindings/bus/uniphier-system-bus.txt.
The old binding will be still supported for a while to keep the
backward compatibility.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This property is used in common by several boards.  Move it to the
common place (uniphier-support-card.dtsi).  If necessary, each board
can still override the property.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add the three leds on the sama5d2 Xplained board with their pinctrl node.
The blue led is positioned with the "heartbeat" trigger.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: add commit message and adapt to newer kernel]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add the push button named "PB USER" with code 0x104. Associated pinctrl node is
also added.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

For USB gadget on port A (device mode):
- pin PA31 is configured as an input GPIO which triggers an interrupt when
  vbus is detected on USB port A.
- pin PB9 is configured as an output GPIO and set to low level so the
  board doesn't supply vbus to USB port A.

For USB host:
- pin PB10 is configured as an output GPIO and is active at high level.
  The ohci driver will activate this pin so the board supplies vbus to USB
  port B.
- pin PB9 should be configured as an output GPIO and active at high level
  to use to USB port A in host mode (conflicts with USB gadget).
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The polarity of the gpio buttons is defined to '0' which is
active high. The buttons are active low though which has been verified by
testing it and by looking into the schematics. While at it use
defines rathers than numbers for the key codes.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Both nodes are required to access NAND Flash memory. Additional
settings will be necessary at the board level to use it.
Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The dmas/dma-names properties are added to the UART nodes. Note that additional
properties are needed to enable them at the board level: check bindings for
details.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

All pinctrl nodes for the Atmel pinctrl controller need to have their
bias configuration explicitly defined. Otherwise, the pinctrl mapping
is not valid.

It works for now as the pinctrl driver proceeds even with invalid
mappings, but this can become an issue, if the pinctrl driver starts
to require valid mappings. Additionally, the pin is not protected from
being remapped later by an other driver.

There is an external 1kOhms pull-up to 3.3V, so no bias is required on
the Ethernet PHY's interrupt line.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add a device tree node entry for DAC peripheral on Vybrid SoC.
Signed-off-by: NSanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The backlinks are already there since commit 4520e692 ("ARM: dts:
imx6qdl: Add IPU DI ports and endpoints, move imx-drm node to dtsi")
and were moved by commit 70c2652c ("ARM: dts: imx6qdl: Move existing
MIPI DSI ports into a new 'ports' node"), but the links from IPU2 DI0/1
to the MIPI DSI mux are missing. Fix this.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add support for Advantech/GE B850v3 board.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add support for Advantech/GE B650v3 board.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add support for Advantech/GE B450v3 board.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Advantech has 3 carrier boards (B450v3, B650v3, B850v3) which use
the Advantech BA-16 module (based on iMX6D). This file has the
devicetree entries that are common to all 3 boards.
Signed-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NJustin Waters <justin.waters@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add support for Advantech BA-16 module based on iMX6D processor

Basic information about the module:
 - Module manufacturer: Advantech
 - CPU: Freescale ARM Cortex-A9 i.MX6
 - SPECS:
     Up to 2GB Onboard DDR3 Memory;
     Up to 16GB Onboard eMMC NAND Flash
     Supports OpenGL ES 2.0 and OpenVG 1.1
     HDMI, 24-bit LVDS
     1x UART, 2x I2C, 8x GPIO,
     4x Host USB 2.0 port, 1x USB OTG port,
     1x micro SD (SDHC),1x SDIO, 1x SATA II,
     1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
 - Website: http://goo.gl/JED98USigned-off-by: NAkshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: NJustin Waters <justin.waters@timesys.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

For imx35, it needs three clocks to let the controller work,
the old code is wrong, and the usbmisc does not include
clock handling code any more.
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

For imx25, it needs three clocks to let the controller work,
the old code is wrong, and usbmisc has not included clock
handling code any more.
Tested-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

This patch adds the device node for the i.MX6UL keypad controller.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add the device node for the i.MX6UL GPMI interface and the related
APBH DMA which is necessary for the GPMI to work properly.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add the device node for the i.MX6UL eLCDIF interface.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add device nodes for the i.MX6UL synchronous audio interfaces (SAI).
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add device nodes for the i.MX6UL flexcan interfaces.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add device node for the i.MX6UL SDMA unit.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Add device nodes for the PWM uinits 1..4 which were missing in the
original commit for i.MX6UL support.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Since PWMs are only useful if they are actually connected to an output pin,
let users enable them explicitly in their device trees where they should
also set up the pin configuration. This is in sync with a recent change
(commit e2675266 "ARM: dts: imx6qdl: disable PWMs by default")
to other i.MX SoCs.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

i.MX6UL PWMs require real clocks. Define the appropriate clocks for
the PWM units.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

The i.MX6UL GPT unit requires real clocks. Define the appropriate
clocks to make it work.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

imx6ul.dtsi references the macro 'KEY_POWER' from
dt-bindings/input/input.h. Thus, move the include statement for this
file from imx6ul-14x14-evk.dts to imx6ul.dtsi itself.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Move the tsc node to keep the nodes sorted in ascending order by unit
address.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>

Pad DISPB2_SER_RS has no function DISP1_EXT_CLK.
The definition is obviusly a copy/paste error from
MX51_PAD_DISPB2_SER_RS__DISP1_PIN16.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>