- 29 4月, 2016 1 次提交
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由 David Müller 提交于
Since commit 21947ba6 ("serial: 8250_pci: replace switch-case by formula"), the 8250 driver crashes in the byt_set_termios() function with a divide error. This is caused by the fact that a baud rate of 0 (B0) is not handled properly. Fix it by falling back to B9600 in this case. Signed-off-by: NDavid Müller <d.mueller@elsoft.ch> Fixes: 21947ba6 ("serial: 8250_pci: replace switch-case by formula") Cc: stable@vger.kernel.org Suggested-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 08 3月, 2016 3 次提交
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由 Mathieu OTHACEHE 提交于
Add support for : - CP-102E: 2 ports RS232 PCIE card - CP-102EL: 2 ports RS232 PCIE card - CP-132EL: 2 ports RS422/485 PCIE card - CP-114EL: 4 ports RS232/422/485 PCIE card - CP-104EL-A: 4 ports RS232 PCIE card - CP-168EL-A: 8 ports RS232 PCIE card - CP-118EL-A: 8 ports RS232/422/485 PCIE card - CP-118E-A: 8 ports RS422/485 PCIE card - CP-138E-A: 8 ports RS422/485 PCIE card - CP-134EL-A: 4 ports RS422/485 PCIE card - CP-116E-A (A): 8 ports RS232/422/485 PCIE card - CP-116E-A (B): 8 ports RS232/422/485 PCIE card This patch is based on information extracted from vendor mxupcie driver available on MOXA website. I was able to test it on a CP-168EL-A on PC. Signed-off-by: NMathieu OTHACEHE <m.othacehe@gmail.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Andy Shevchenko 提交于
There is no need to have channel offset defined since all BayTrail and Braswell ports are 1 channel. Remove unneeded definition. While here, remove comment which has no value. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Andy Shevchenko 提交于
The managed API provides a better approach to help with acquiring and releasing resources. Besides that error handling becomes simpler. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 07 2月, 2016 9 次提交
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由 Anton Wuerfel 提交于
Checkpatch complains about incorrect indentation of switch/case statements. This patch fixes the corresponding warnings. Additionally some indentation is changed to match the correct format specified in the Linux Kernel Coding Style. Signed-off-by: NAnton Würfel <anton.wuerfel@fau.de> Signed-off-by: NPhillip Raffeck <phillip.raffeck@fau.de> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-kernel@i4.cs.fau.de Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Anton Wuerfel 提交于
This patch refactors a switch case statement by merging an if condition in the default case into an identical condition right after the switch statement. This comes with a slight change in behaviour: If pci_netmos_9900_numports returns 0, an additional warning is printed. Signed-off-by: NAnton Würfel <anton.wuerfel@fau.de> Signed-off-by: NPhillip Raffeck <phillip.raffeck@fau.de> Suggested-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-kernel@i4.cs.fau.de Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Anton Wuerfel 提交于
This patch fixes a checkpatch warning caused by missing parentheses in the definition of a macro. Furthermore redundant parentheses are removed in an assignment. Signed-off-by: NAnton Würfel <anton.wuerfel@fau.de> Signed-off-by: NPhillip Raffeck <phillip.raffeck@fau.de> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-kernel@i4.cs.fau.de Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Anton Wuerfel 提交于
This patch fixes checkpatch warnings about unnecessary else blocks after return statements. Signed-off-by: NAnton Würfel <anton.wuerfel@fau.de> Signed-off-by: NPhillip Raffeck <phillip.raffeck@fau.de> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-kernel@i4.cs.fau.de Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Anton Wuerfel 提交于
Indentation is changed to match the correct format of using tabs instead of spaces wherever possible. Signed-off-by: NAnton Würfel <anton.wuerfel@fau.de> Signed-off-by: NPhillip Raffeck <phillip.raffeck@fau.de> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Cc: linux-kernel@i4.cs.fau.de Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Anton Wuerfel 提交于
This patch fixes whitespace errors reported by checkpatch to increase readability. Main focus is on missing spaces after commas in function headers and macros (like foo,bar edited to foo, bar). Signed-off-by: NAnton Würfel <anton.wuerfel@fau.de> Signed-off-by: NPhillip Raffeck <phillip.raffeck@fau.de> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: linux-kernel@i4.cs.fau.de Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jeremy McNicoll 提交于
WCH382 2S board is a PCIe card with 2 DB9 COM ports detected as Serial controller: Device 1c00:3253 (rev 10) (prog-if 05 [16850]) Signed-off-by: NJeremy McNicoll <jmcnicol@redhat.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Beulich 提交于
Considering that pci_pericom_setup(()'s only difference to pci_default_setup() is the setting of the uartclk field, and taking into account that this field already gets taken care of by having the base_baud field filled in the pci_boards[] entries, there's no need for both the function and the quirks table entry. Signed-off-by: NJan Beulich <jbeulich@suse.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Geliang Tang 提交于
Use to_pci_dev() instead of open-coding it. Signed-off-by: NGeliang Tang <geliangtang@163.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 30 1月, 2016 1 次提交
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由 Mika Westerberg 提交于
Some recent (early 2015) macbooks have Intel Broadwell where LPSS UARTs are PCI enumerated instead of ACPI. The LPSS UART block is pretty much same as used on Intel Baytrail so we can reuse the existing Baytrail setup code. Add both Broadwell LPSS UART ports to the list of supported devices. Signed-off-by: NLeif Liddy <leif.liddy@gmail.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 18 10月, 2015 2 次提交
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由 Heikki Krogerus 提交于
The platforms that have this UART, but that don't have separate PCI device for the DMA Engine, need to create the HSU DMA Engine device separately. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Heikki Krogerus 提交于
Intel MID UART quirks require already quite a bit of code in 8250_pci.c. On new Intel platforms where it is used, the integrated DMA engine no longer has its own PCI device, but is instead configured from the UART's MMIO. That means we will have to add even more code for handling just MID UARTs. Instead of adding that to 8250_pci.c, splitting the support of Intel MID UART into its own driver. Handling of the integrated DMA engine becomes much simpler this way. Own driver will also remove the need for things like specific set_termios hooks for every board using this UART, and simplify the handling of it in general. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 06 8月, 2015 1 次提交
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由 Peter Hung 提交于
Fix RS232/485 mode incorrect setting after S3/S4 resume for F81504/508/512 We had add RS232/485 RTS control with fecf27a3. But when it resume from S3/S4, the mode register 0x40 + 0x08 * idx + 7 will rewrite to 0x01 (RS232 mode). This patch will modify 2 sections. One is pci_fintek_init(), if it called when first init, it will write mode register with 0x01. If it called from S3/S4 resume, it's will get the relative port data and pass it to pci_fintek_rs485_config() with NULL rs485 parameter. The another modification is in pci_fintek_rs485_config(). It'll re-apply old configuration when the parameter rs485 is NULL. Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 05 8月, 2015 2 次提交
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由 Adam Lee 提交于
Pericom PI7C9X795[1248] are Uno/Dual/Quad/Octal UART devices, this patch enables them, also defines PCI_VENDOR_ID_PERICOM here. Signed-off-by: NAdam Lee <adam.lee@canonical.com> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Qipeng Zha 提交于
According to DesignWare 8250 spec, if auto flow control mode is enabled, a change in CTS does not cause an interrupt, so sw-assisted CTS flow control mode will not work properly. There reported an GPS firmware download failure issue, and we verified the root cause is, the default sw-assisted CTS flow control mode can not work properly since no interrupt when got CTS signal. This patch is to enable auto CTS mode by defaut if CRTSCTS is enable for DesignWare 8250 controller. Signed-off-by: NHuiquan Zhong <huiquan.zhong@intel.com> Signed-off-by: NQipeng Zha <qipeng.zha@intel.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 8月, 2015 1 次提交
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由 Peter Hung 提交于
Add RS485 control for Fintek F81504/508/512 F81504/508/512 can control their RTS with H/W mode. PCI configuration space for each port is 0x40 + idx * 8 + 7. When it set with 0x01, it's configured with RS232 mode. RTS is controlled by MCR. When it set with 0x11, it's configured with RS485 mode. RTS is controlled by H/W, RTS low with idle & RX, high with TX. When it set with 0x31, it's configured with RS485 mode. RTS is controlled by H/W, RTS high with idle & RX, low with TX. We will force 0x01 on pci_fintek_setup(). Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 13 6月, 2015 2 次提交
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由 Soeren Grunewald 提交于
The internal clock of the master chip, which is usually 125MHz, is only half (62.5MHz) for the slave chips. So we have to adjust the uartclk for all the slave ports. Therefor we add a new function to determine if a slave chip is present and update pci_xr17v35x_setup accordingly. Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Soeren Grunewald 提交于
The Exar XR17V358 can also be combined with a XR17V354 chip to act as a single 12 port chip. This works the same way as the combining two XR17V358 chips. But the reported device id then is 0x4358. Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 29 4月, 2015 1 次提交
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由 Soeren Grunewald 提交于
The Exar XR17V358 chip usually provides only 8 ports. But two chips can be combined to act as a single 16 port chip. Therefor one chip is configured as master the second as slave by connecting the mode pin to VCC (master) or GND (slave). Then the master chip is reporting a different device-id depending on whether a slave is detected or not. The UARTs 8-15 are addressed from 0x2000-0x3fff. So the offset of 0x400 from UART to UART can be used to address all 16 ports as before. See: https://www.exar.com/common/content/document.ashx?id=1587 page 11 Signed-off-by: NSoeren Grunewald <soeren.grunewald@desy.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 4月, 2015 1 次提交
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由 Peter Hung 提交于
Serial ports of F81504/F81508/F81512 will failed when wakeup from S3(STR). It's due to when the system wakeup from S3(STR), this PCI device's configuration space from 0x40 to 0x40 + max_port * 0x08 should be re-configured. We move all initialization from pci_fintek_setup() to pci_fintek_init() and set it to pci_serial_quirks .init section. It's will re-init this device when system wakeup from pciserial_resume_ports(). Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 3月, 2015 4 次提交
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由 Andy Shevchenko 提交于
Intel Tangier contains 4 HSUART ports as found on Intel Edison board which are 8250 compatible. The patch adds necessary bits to the driver. Note that the HSU port0 is currently unavailable and thus not supported. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Andy Shevchenko 提交于
This patch replaces a switch-case by a formula using rational best approximation that does necessary calculations for intel_mid_set_termios(). Below is a list of the calculations done for all defined baud rates. Each line in a format: 1) nominator, 2) denominator, 3) prescaler, 4) Fuart, 5) port UART clock, 6) list of baud rates with DLAB values. 24 25 12 48000000 64000000 4000000(1) 49 50 14 49000000 56000000 3500000(1) 4 5 16 40000000 40000000 2500000(1) 16 25 16 32000000 32000000 500000(4),1000000(2),2000000(1) 24 25 16 48000000 48000000 1500000(2),3000000(1) 2304 3125 16 36864000 36864000 576000(4),1152000(2) 8192 15625 16 26214400 26214400 50(32768),200(8192) 9216 15625 16 29491200 29491200 1800(1024),57600(32),115200(16), 230400(8),460800(4),921600(2),1843200(1) 12288 15625 16 39321600 39321600 75(32768),150(16384),300(8192), 600(4096),1200(2048),2400(1024),4800(512), 9600(256),19200(128),38400(64) 45056 78125 16 28835840 28835840 110(16384) 274432 390625 16 35127296 35127296 134(16384) Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Andy Shevchenko 提交于
This patch replaces a switch-case by a formula using rational best approximation that does necessary calculations for byt_set_termios(). Below is a list of the calculations done for all defined baud rates. Each line in a format: 1) numerator, 2) denominator, 3) prescaler, 4) Fuart, 5) port UART clock, 6) list of baud rates with DLAB values. 4 5 16 80000000 80000000 2500000(2) 14 25 16 56000000 56000000 3500000(1) 16 25 16 64000000 64000000 500000(8),1000000(4),2000000(2), 4000000(1) 24 25 16 96000000 96000000 1500000(4),3000000(2) 2180 3103 16 70254592 70254592 134(32768) 2304 3125 16 73728000 73728000 576000(8),1152000(4) 8192 15625 16 52428800 52428800 50(65536),200(16384) 9216 15625 16 58982400 58982400 1800(2048),57600(64),115200(32), 230400(16),460800(8),921600(4),1843200(2) 12288 15625 16 78643200 78643200 75(65536),150(32768),300(16384), 600(8192),1200(4096),2400(2048), 4800(1024),9600(512),19200(256),38400(128) 9893 17154 16 57671680 57671680 110(32768) Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NPeter Hurley <peter@hurleysoftware.com> Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Peter Hung 提交于
Remove pci_fintek_setup() non-used var with calculation ciobase Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 07 3月, 2015 5 次提交
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由 Andy Shevchenko 提交于
Intel Penwell supports 3 HSUART ports which are 8250 compatible. The patch adds necessary bits to the driver. The functions have intel_mid_* prefix due to more than one platform will use this code. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Andy Shevchenko 提交于
Convert the legacy system PM callbacks to new ones. Meanwhile, remove the redudant calls to the PCI for changing a power state since it's done by bus code. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Wang YanQing 提交于
These quirk entries have the same effect as default quirk entry, so we can just delete them. Signed-off-by: NWang YanQing <udknight@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Wang YanQing 提交于
Commit 8b5c913f ("serial: 8250_pci: Add WCH CH352 quirk to avoid Xscale detection") trigger one redundant entry report message. This patch fix it. Reported-by: NRussell King <rmk@arm.linux.org.uk> Signed-off-by: NWang YanQing <udknight@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Russell King 提交于
I'm still receiving reports to my email address, so let's point this at the linux-serial mailing list instead. Cc: <stable@vger.kernel.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 03 2月, 2015 1 次提交
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由 Heikki Krogerus 提交于
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 1月, 2015 1 次提交
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由 Sergej Pupykin 提交于
WCH384 4S board is a PCI-E card with 4 DB9 COM ports detected as Serial controller: Device 1c00:3470 (rev 10) (prog-if 05 [16850]) Signed-off-by: NSergej Pupykin <ml@sergej.pp.ru> Acked-by: NZany Yan <sirlight@cox.net> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 26 11月, 2014 1 次提交
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由 Peter Hung 提交于
The original driver fixed the io address with 0xe000+idx*8, but real io address assigned from BIOS is dynamically from read PCI configure space 0x24, 0x20, 0x1c. The Fintek F81504/F81508/F81512 maybe malfunction without this patch and malfunction surely when more then 1 PCI card. Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 07 11月, 2014 3 次提交
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由 Sergej Pupykin 提交于
WCH382 is a PCI-E card with 1 LPT and 2 DB9 COM ports detected as Serial controller: Device 1c00:3250 (rev 10) (prog-if 05 [16850]) Signed-off-by: NSergej Pupykin <ml@sergej.pp.ru> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Aaron Sierra 提交于
Check the return value of ioremap_nocache to make sure we got a valid mapping. Signed-off-by: NAaron Sierra <asierra@xes-inc.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Aaron Sierra 提交于
Several init/setup functions passed the PCI BAR resource start address to ioremap_nocache() via an unsigned long. This caused address truncation for a 32-bit device mapped above 4 GiB (i.e. the CPU interacts with the device via a translated address), which resulted in a kernel panic. This patch replaces all of the instances of intermediate variable use with pci_ioremap_bar() to ensure the full resource_size_t start address is used and that ioremap_nocache() is still called. The kernel panic (Exar XR17V358 PCIe device on a Freescale P2020 SBC): Machine check in kernel mode. Caused by (from MCSR=10008): Bus - Read Data Bus Error Oops: Machine check, sig: 7 [#1] SMP NR_CPUS=2 X-ES P2020 Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.14.15-xes_r2-00002-g560e401 #978 task: bf850000 ti: bffee000 task.ti: bf84c000 NIP: 80318e10 LR: 80319ecc CTR: 80318dfc REGS: bffeff10 TRAP: 0204 Not tainted (3.14.15-xes_r2-00002-g560e401) MSR: 00021000 <CE,ME> CR: 20adbe42 XER: 00000000 DEAR: c1058001 ESR: 00000000 GPR00: 00000000 bf84db30 bf850000 80cb4af8 00000001 00000000 80000007 80000000 GPR08: bf837c9c c1058001 00000001 00000000 80000007 00000000 80002a10 00000000 GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 80cb0000 80c72dc4 GPR24: 80cb4900 fffffffe 00029000 00000001 bf8c11e8 ffffffea 80c72ce4 80cb4af8 NIP [80318e10] mem_serial_in+0x14/0x28 LR [80319ecc] serial8250_config_port+0x160/0xe38 Call Trace: [bf84db30] [80319d94] serial8250_config_port+0x28/0xe38 (unreliable) [bf84db60] [80315e3c] uart_add_one_port+0x148/0x3a4 [bf84dbf0] [8031bf40] serial8250_register_8250_port+0x2dc/0x3c8 [bf84dc20] [8032111c] pciserial_init_ports+0xd4/0x1c0 [bf84dd50] [803212f8] pciserial_init_one+0xf0/0x224 [bf84dd90] [802d8ff4] local_pci_probe+0x34/0x8c [bf84dda0] [802d92c8] pci_device_probe+0x84/0xa0 [bf84ddc0] [80329ee0] driver_probe_device+0xac/0x26c [bf84dde0] [8032a15c] __driver_attach+0xbc/0xc0 [bf84de00] [80328388] bus_for_each_dev+0x90/0xcc [bf84de30] [80329cd0] driver_attach+0x24/0x34 [bf84de40] [80328e28] bus_add_driver+0x104/0x1fc [bf84de60] [8032a8c8] driver_register+0x70/0x138 [bf84de70] [802d93c0] __pci_register_driver+0x48/0x58 [bf84de80] [8077e0e4] serial_pci_driver_init+0x24/0x34 [bf84de90] [80002228] do_one_initcall+0x34/0x1b0 [bf84df00] [80764294] kernel_init_freeable+0x138/0x1e8 [bf84df30] [80002a24] kernel_init+0x14/0x108 [bf84df40] [8000ef94] ret_from_kernel_thread+0x5c/0x64 Instruction dump: 800800c4 7d290214 39290001 7c0004ac 7ca049ae 7c0004ac 4e800020 88030035 81230008 7c840030 7d292214 7c0004ac <88690000> 0c030000 4c00012c 5463063e ---[ end trace e3c16443b5d573c6 ]--- Signed-off-by: NAaron Sierra <asierra@xes-inc.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 06 11月, 2014 1 次提交
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由 Mike Skoog 提交于
Added recognition of EndRun Technologies PCIe PTP slave card and setup two ttySx ports for communication with the card for retrieval of PTP based time and to communicate with the card's Linux OS. Signed-off-by: NMike Skoog <mskoog@endruntechnologies.com> Signed-off-by: NMike Korreng <mkorreng@endruntechnologies.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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