1. 29 4月, 2016 1 次提交
  2. 08 3月, 2016 3 次提交
  3. 07 2月, 2016 9 次提交
  4. 30 1月, 2016 1 次提交
  5. 18 10月, 2015 2 次提交
  6. 06 8月, 2015 1 次提交
    • P
      serial: 8250_pci: fix mode after S3/S4 resume for F81504/508/512 · d3159455
      Peter Hung 提交于
      Fix RS232/485 mode incorrect setting after S3/S4 resume for F81504/508/512
      
      We had add RS232/485 RTS control with fecf27a3. But when it
      resume from S3/S4, the mode register 0x40 + 0x08 * idx + 7 will
      rewrite to 0x01 (RS232 mode).
      
      This patch will modify 2 sections.
      
      One is pci_fintek_init(), if it called when first init, it will
      write mode register with 0x01. If it called from S3/S4 resume,
      it's will get the relative port data and pass it to
      pci_fintek_rs485_config() with NULL rs485 parameter.
      
      The another modification is in pci_fintek_rs485_config(). It'll
      re-apply old configuration when the parameter rs485 is NULL.
      Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      d3159455
  7. 05 8月, 2015 2 次提交
  8. 04 8月, 2015 1 次提交
    • P
      serial: 8250_pci: add RS485 for F81504/508/512 · fecf27a3
      Peter Hung 提交于
      Add RS485 control for Fintek F81504/508/512
      
      F81504/508/512 can control their RTS with H/W mode.
      PCI configuration space for each port is 0x40 + idx * 8 + 7.
      
      When it set with 0x01, it's configured with RS232 mode.
      RTS is controlled by MCR.
      
      When it set with 0x11, it's configured with RS485 mode.
      RTS is controlled by H/W, RTS low with idle & RX, high with TX.
      
      When it set with 0x31, it's configured with RS485 mode.
      RTS is controlled by H/W, RTS high with idle & RX, low with TX.
      
      We will force 0x01 on pci_fintek_setup().
      Signed-off-by: NPeter Hung <hpeter+linux_kernel@gmail.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      fecf27a3
  9. 13 6月, 2015 2 次提交
  10. 29 4月, 2015 1 次提交
  11. 10 4月, 2015 1 次提交
  12. 27 3月, 2015 4 次提交
  13. 07 3月, 2015 5 次提交
  14. 03 2月, 2015 1 次提交
  15. 10 1月, 2015 1 次提交
  16. 26 11月, 2014 1 次提交
  17. 07 11月, 2014 3 次提交
    • S
      parport: Add support for the WCH382 2S/1P multi-IO card · 2fdd8c8c
      Sergej Pupykin 提交于
      WCH382 is a PCI-E card with 1 LPT and 2 DB9 COM ports detected as
      Serial controller: Device 1c00:3250 (rev 10) (prog-if 05 [16850])
      Signed-off-by: NSergej Pupykin <ml@sergej.pp.ru>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      2fdd8c8c
    • A
      serial: 8250_pci: Check mapping in pci_ni8430_init · 5d14bba9
      Aaron Sierra 提交于
      Check the return value of ioremap_nocache to make sure we got a
      valid mapping.
      Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      5d14bba9
    • A
      serial: 8250_pci: Handle devices mapped above 4 GiB · 398a9db6
      Aaron Sierra 提交于
      Several init/setup functions passed the PCI BAR resource start address
      to ioremap_nocache() via an unsigned long. This caused address truncation
      for a 32-bit device mapped above 4 GiB (i.e. the CPU interacts with the
      device via a translated address), which resulted in a kernel panic.
      
      This patch replaces all of the instances of intermediate variable use
      with pci_ioremap_bar() to ensure the full resource_size_t start address
      is used and that ioremap_nocache() is still called.
      
      The kernel panic (Exar XR17V358 PCIe device on a Freescale P2020 SBC):
      
      Machine check in kernel mode.
      Caused by (from MCSR=10008): Bus - Read Data Bus Error
      Oops: Machine check, sig: 7 [#1]
      SMP NR_CPUS=2 X-ES P2020
      Modules linked in:
      CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.14.15-xes_r2-00002-g560e401 #978
      task: bf850000 ti: bffee000 task.ti: bf84c000
      NIP: 80318e10 LR: 80319ecc CTR: 80318dfc
      REGS: bffeff10 TRAP: 0204   Not tainted  (3.14.15-xes_r2-00002-g560e401)
      MSR: 00021000 <CE,ME>  CR: 20adbe42  XER: 00000000
      DEAR: c1058001 ESR: 00000000
      GPR00: 00000000 bf84db30 bf850000 80cb4af8 00000001 00000000 80000007 80000000
      GPR08: bf837c9c c1058001 00000001 00000000 80000007 00000000 80002a10 00000000
      GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 80cb0000 80c72dc4
      GPR24: 80cb4900 fffffffe 00029000 00000001 bf8c11e8 ffffffea 80c72ce4 80cb4af8
      NIP [80318e10] mem_serial_in+0x14/0x28
      LR [80319ecc] serial8250_config_port+0x160/0xe38
      Call Trace:
      [bf84db30] [80319d94] serial8250_config_port+0x28/0xe38 (unreliable)
      [bf84db60] [80315e3c] uart_add_one_port+0x148/0x3a4
      [bf84dbf0] [8031bf40] serial8250_register_8250_port+0x2dc/0x3c8
      [bf84dc20] [8032111c] pciserial_init_ports+0xd4/0x1c0
      [bf84dd50] [803212f8] pciserial_init_one+0xf0/0x224
      [bf84dd90] [802d8ff4] local_pci_probe+0x34/0x8c
      [bf84dda0] [802d92c8] pci_device_probe+0x84/0xa0
      [bf84ddc0] [80329ee0] driver_probe_device+0xac/0x26c
      [bf84dde0] [8032a15c] __driver_attach+0xbc/0xc0
      [bf84de00] [80328388] bus_for_each_dev+0x90/0xcc
      [bf84de30] [80329cd0] driver_attach+0x24/0x34
      [bf84de40] [80328e28] bus_add_driver+0x104/0x1fc
      [bf84de60] [8032a8c8] driver_register+0x70/0x138
      [bf84de70] [802d93c0] __pci_register_driver+0x48/0x58
      [bf84de80] [8077e0e4] serial_pci_driver_init+0x24/0x34
      [bf84de90] [80002228] do_one_initcall+0x34/0x1b0
      [bf84df00] [80764294] kernel_init_freeable+0x138/0x1e8
      [bf84df30] [80002a24] kernel_init+0x14/0x108
      [bf84df40] [8000ef94] ret_from_kernel_thread+0x5c/0x64
      Instruction dump:
      800800c4 7d290214 39290001 7c0004ac 7ca049ae 7c0004ac 4e800020 88030035
      81230008 7c840030 7d292214 7c0004ac <88690000> 0c030000 4c00012c 5463063e
      ---[ end trace e3c16443b5d573c6 ]---
      Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      398a9db6
  18. 06 11月, 2014 1 次提交