1. 13 11月, 2019 4 次提交
    • J
      drm/i915/cmdparser: Add support for backward jumps · 6e53c71a
      Jon Bloomfield 提交于
      commit f8c08d8faee5567803c8c533865296ca30286bbf upstream.
      
      To keep things manageable, the pre-gen9 cmdparser does not
      attempt to track any form of nested BB_START's. This did not
      prevent usermode from using nested starts, or even chained
      batches because the cmdparser is not strictly enforced pre gen9.
      
      Instead, the existence of a nested BB_START would cause the batch
      to be emitted in insecure mode, and any privileged capabilities
      would not be available.
      
      For Gen9, the cmdparser becomes mandatory (for BCS at least), and
      so not providing any form of nested BB_START support becomes
      overly restrictive. Any such batch will simply not run.
      
      We make heavy use of backward jumps in igt, and it is much easier
      to add support for this restricted subset of nested jumps, than to
      rewrite the whole of our test suite to avoid them.
      
      Add the required logic to support limited backward jumps, to
      instructions that have already been validated by the parser.
      
      Note that it's not sufficient to simply approve any BB_START
      that jumps backwards in the buffer because this would allow an
      attacker to embed a rogue instruction sequence within the
      operand words of a harmless instruction (say LRI) and jump to
      that.
      
      We introduce a bit array to track every instr offset successfully
      validated, and test the target of BB_START against this. If the
      target offset hits, it is re-written to the same offset in the
      shadow buffer and the BB_START cmd is allowed.
      
      Note: This patch deliberately ignores checkpatch issues in the
      cmdtables, in order to match the style of the surrounding code.
      We'll correct the entire file in one go in a later patch.
      
      v2: set dispatch secure late (Mika)
      v3: rebase (Mika)
      v4: Clear whitelist on each parse
      Minor review updates (Chris)
      v5: Correct backward jump batching
      v6: fix compilation error due to struct eb shuffle (Mika)
      
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Dave Airlie <airlied@redhat.com>
      Cc: Takashi Iwai <tiwai@suse.de>
      Cc: Tyler Hicks <tyhicks@canonical.com>
      Signed-off-by: NJon Bloomfield <jon.bloomfield@intel.com>
      Signed-off-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris.p.wilson@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      6e53c71a
    • J
      drm/i915: Support ro ppgtt mapped cmdparser shadow buffers · 7ce726b6
      Jon Bloomfield 提交于
      commit 4f7af1948abcb18b4772fe1bcd84d7d27d96258c upstream.
      
      For Gen7, the original cmdparser motive was to permit limited
      use of register read/write instructions in unprivileged BB's.
      This worked by copying the user supplied bb to a kmd owned
      bb, and running it in secure mode, from the ggtt, only if
      the scanner finds no unsafe commands or registers.
      
      For Gen8+ we can't use this same technique because running bb's
      from the ggtt also disables access to ppgtt space. But we also
      do not actually require 'secure' execution since we are only
      trying to reduce the available command/register set. Instead we
      will copy the user buffer to a kmd owned read-only bb in ppgtt,
      and run in the usual non-secure mode.
      
      Note that ro pages are only supported by ppgtt (not ggtt), but
      luckily that's exactly what we need.
      
      Add the required paths to map the shadow buffer to ppgtt ro for Gen8+
      
      v2: IS_GEN7/IS_GEN (Mika)
      v3: rebase
      v4: rebase
      v5: rebase
      Signed-off-by: NJon Bloomfield <jon.bloomfield@intel.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Dave Airlie <airlied@redhat.com>
      Cc: Takashi Iwai <tiwai@suse.de>
      Cc: Tyler Hicks <tyhicks@canonical.com>
      Signed-off-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris.p.wilson@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      7ce726b6
    • J
      drm/i915: Remove Master tables from cmdparser · fba4207c
      Jon Bloomfield 提交于
      commit 66d8aba1cd6db34af10de465c0d52af679288cb6 upstream.
      
      The previous patch has killed support for secure batches
      on gen6+, and hence the cmdparsers master tables are
      now dead code. Remove them.
      Signed-off-by: NJon Bloomfield <jon.bloomfield@intel.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Dave Airlie <airlied@redhat.com>
      Cc: Takashi Iwai <tiwai@suse.de>
      Cc: Tyler Hicks <tyhicks@canonical.com>
      Reviewed-by: NChris Wilson <chris.p.wilson@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      fba4207c
    • J
      drm/i915: Disable Secure Batches for gen6+ · f1ff7708
      Jon Bloomfield 提交于
      commit 44157641d448cbc0c4b73c5231d2b911f0cb0427 upstream.
      
      Retroactively stop reporting support for secure batches
      through the api for gen6+ so that older binaries trigger
      the fallback path instead.
      
      Older binaries use secure batches pre gen6 to access resources
      that are not available to normal usermode processes. However,
      all known userspace explicitly checks for HAS_SECURE_BATCHES
      before relying on the secure batch feature.
      
      Since there are no known binaries relying on this for newer gens
      we can kill secure batches from gen6, via I915_PARAM_HAS_SECURE_BATCHES.
      
      v2: rebase (Mika)
      v3: rebase (Mika)
      Signed-off-by: NJon Bloomfield <jon.bloomfield@intel.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Dave Airlie <airlied@redhat.com>
      Cc: Takashi Iwai <tiwai@suse.de>
      Cc: Tyler Hicks <tyhicks@canonical.com>
      Signed-off-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris.p.wilson@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      f1ff7708
  2. 27 11月, 2018 1 次提交
  3. 07 8月, 2018 1 次提交
    • C
      drm/i915: Interactive RPS mode · 027063b1
      Chris Wilson 提交于
      RPS provides a feedback loop where we use the load during the previous
      evaluation interval to decide whether to up or down clock the GPU
      frequency. Our responsiveness is split into 3 regimes, a high and low
      plateau with the intent to keep the gpu clocked high to cover occasional
      stalls under high load, and low despite occasional glitches under steady
      low load, and inbetween. However, we run into situations like kodi where
      we want to stay at low power (video decoding is done efficiently
      inside the fixed function HW and doesn't need high clocks even for high
      bitrate streams), but just occasionally the pipeline is more complex
      than a video decode and we need a smidgen of extra GPU power to present
      on time. In the high power regime, we sample at sub frame intervals with
      a bias to upclocking, and conversely at low power we sample over a few
      frames worth to provide what we consider to be the right levels of
      responsiveness respectively. At low power, we more or less expect to be
      kicked out to high power at the start of a busy sequence by waitboosting.
      
      Prior to commit e9af4ea2 ("drm/i915: Avoid waitboosting on the active
      request") whenever we missed the frame or stalled, we would immediate go
      full throttle and upclock the GPU to max. But in commit e9af4ea2, we
      relaxed the waitboosting to only apply if the pipeline was deep to avoid
      over-committing resources for a near miss. Sadly though, a near miss is
      still a miss, and perceptible as jitter in the frame delivery.
      
      To try and prevent the near miss before having to resort to boosting
      after the fact, we use the pageflip queue as an indication that we are
      in an "interactive" regime and so should sample the load more frequently
      to provide power before the frame misses it vblank. This will make us
      more favorable to providing a small power increase (one or two bins) as
      required rather than going all the way to maximum and then having to
      work back down again. (We still keep the waitboosting mechanism around
      just in case a dramatic change in system load requires urgent uplocking,
      faster than we can provide in a few evaluation intervals.)
      
      v2: Reduce rps_set_interactive to a boolean parameter to avoid the
      confusion of what if they wanted a new power mode after pinning to a
      different mode (which to choose?)
      v3: Only reprogram RPS while the GT is awake, it will be set when we
      wake the GT, and while off warns about being used outside of rpm.
      v4: Fix deferred application of interactive mode
      v5: s/state/interactive/
      v6: Group the mutex with its principle in a substruct
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107111
      Fixes: e9af4ea2 ("drm/i915: Avoid waitboosting on the active request")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180731132629.3381-1-chris@chris-wilson.co.uk
      (cherry picked from commit 60548c554be2830d29d2533dad0ac8133347ee51)
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      027063b1
  4. 26 7月, 2018 1 次提交
  5. 19 7月, 2018 2 次提交
  6. 13 7月, 2018 4 次提交
  7. 12 7月, 2018 1 次提交
  8. 11 7月, 2018 1 次提交
  9. 10 7月, 2018 1 次提交
  10. 09 7月, 2018 1 次提交
    • C
      drm/i915: Provide a timeout to i915_gem_wait_for_idle() · ec625fb9
      Chris Wilson 提交于
      Usually we have no idea about the upper bound we need to wait to catch
      up with userspace when idling the device, but in a few situations we
      know the system was idle beforehand and can provide a short timeout in
      order to very quickly catch a failure, long before hangcheck kicks in.
      
      In the following patches, we will use the timeout to curtain two overly
      long waits, where we know we can expect the GPU to complete within a
      reasonable time or declare it broken.
      
      In particular, with a broken GPU we expect it to fail during the initial
      GPU setup where do a couple of context switches to record the defaults.
      This is a task that takes a few milliseconds even on the slowest of
      devices, but we may have to wait 60s for hangcheck to give in and
      declare the machine inoperable. In this a case where any gpu hang is
      unacceptable, both from a timeliness and practical standpoint.
      
      The other improvement is that in selftests, we do not need to arm an
      independent timer to inject a wedge, as we can just limit the timeout on
      the wait directly.
      
      v2: Include the timeout parameter in the trace.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180709122044.7028-1-chris@chris-wilson.co.uk
      ec625fb9
  11. 07 7月, 2018 2 次提交
  12. 06 7月, 2018 2 次提交
  13. 05 7月, 2018 2 次提交
  14. 29 6月, 2018 3 次提交
  15. 27 6月, 2018 1 次提交
  16. 21 6月, 2018 2 次提交
  17. 19 6月, 2018 2 次提交
  18. 15 6月, 2018 4 次提交
    • M
      drm/i915: Fix context ban and hang accounting for client · 14921f3c
      Mika Kuoppala 提交于
      If client is smart or lucky enough to create a new context
      after each hang, our context banning mechanism will never
      catch up, and as a result of that it will be saved from
      client banning. This can result in a never ending streak of
      gpu hangs caused by bad or malicious client, preventing
      access from other legit gpu clients.
      
      Fix this by always incrementing per client ban score if
      it hangs in short successions regardless of context ban
      scoring. The exception are non bannable contexts. They remain
      detached from client ban scoring mechanism.
      
      v2: xchg timestamp, tidyup (Chris)
      v3: comment, bannable & banned together (Chris)
      
      Fixes: b083a087 ("drm/i915: Add per client max context ban limit")
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180615104429.31477-1-mika.kuoppala@linux.intel.com
      14921f3c
    • C
      drm/i915: Keep the ctx workarounds tightly packed · 548764bb
      Chris Wilson 提交于
      For each platform, we have a few registers that are rewritten with
      different values -- they are not part of a sequence, just different parts
      of a masked register set at different times (e.g. platform and gen
      workarounds). Consolidate these into a single register write to keep the
      table compact, important since we are running of room in the current
      fixed sized buffer.
      
      While adjusting the construction of the wa table, make it non fatal so
      that the driver still loads but keeping the warning and extra details
      for inspection.
      
      Inspecting the changes for a Kabylake system,
      Before:
      	Address	val		mask		read
      	0x07014	0x20002000	0x00002000	0x00002100
      	0x0E194	0x01000100	0x00000100	0x00000114
      	0x0E4F0	0x81008100	0x00008100	0xFFFF8120
      	0x0E184	0x00200020	0x00000020	0x00000022
      	0x0E194	0x00140014	0x00000014	0x00000114
      	0x07004	0x00420042	0x00000042	0x000029C2
      	0x0E188	0x00080000	0x00000008	0x00008030
      	0x07300	0x80208020	0x00008020	0x00008830
      	0x07300	0x00100010	0x00000010	0x00008830
      	0x0E184	0x00020002	0x00000002	0x00000022
      	0x0E180	0x20002000	0x00002000	0x00002000
      	0x02580	0x00010000	0x00000001	0x00000004
      	0x02580	0x00060004	0x00000006	0x00000004
      	0x07014	0x01000100	0x00000100	0x00002100
      	0x0E100	0x00100010	0x00000010	0x00008050
      
      After:
      	Address	val		mask		read
      	0x02580	0x00070004	0x00000007	0x00000004
      	0x07004	0x00420042	0x00000042	0x000029C2
      	0x07014	0x21002100	0x00002100	0x00002100
      	0x07300	0x80308030	0x00008030	0x00008830
      	0x0E100	0x00100010	0x00000010	0x00008050
      	0x0E180	0x20002000	0x00002000	0x00002000
      	0x0E184	0x00220022	0x00000022	0x00000022
      	0x0E188	0x00080000	0x00000008	0x00008030
      	0x0E194	0x01140114	0x00000114	0x00000114
      	0x0E4F0	0x81008100	0x00008100	0xFFFF8120
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Oscar Mateo <oscar.mateo@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180615120207.13952-1-chris@chris-wilson.co.uk
      548764bb
    • C
      drm/i915: Declare the driver wedged if hangcheck makes no progress · 1fd00c0f
      Chris Wilson 提交于
      Hangcheck is our back up in case the GPU or the driver gets stuck. It
      detects when the GPU is not making any progress and issues a GPU reset.
      However, if the driver is failing to make any progress, we can get
      ourselves into a situation where we continually try resetting the GPU to
      no avail. Employ a second timeout such that if we continue to see the
      same seqno (the stalled engine has made no progress at all) over the
      course of several hangchecks, declare the driver wedged and attempt to
      start afresh.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180602104853.17140-1-chris@chris-wilson.co.ukReviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      1fd00c0f
    • R
      drm/i915/psr: Kill delays when activating psr back. · 5422b37c
      Rodrigo Vivi 提交于
      The immediate enabling was actually not an issue for the
      HW perspective for core platforms that have HW tracking.
      HW will wait few identical idle frames before transitioning
      to actual psr active anyways.
      
      Now that we removed VLV/CHV out of the picture completely
      we can safely remove any delays.
      
      Note that this patch also remove the delayed activation
      on HSW and BDW introduced by commit 'd0ac896a
      ("drm/i915: Delay first PSR activation.")'. This was
      introduced to fix a blank screen on VLV/CHV and also
      masked some frozen screens on other core platforms.
      Probably the same that we are now properly hunting and fixing.
      
      v2:(DK): Remove unnecessary WARN_ONs and make some other
               VLV | CHV more readable.
      v3: Do it regardless the timer rework.
      v4: (DK/CI): Add VLV || CHV check on cancel work at psr_disable.
      v5: Kill remaining items and fully rework activation functions.
      v6: Rebase on top of VLV/CHV clean-up and keep the reactivation
          on a regular non-delayed work to avoid extra delays on exit
          calls and allow us to add few more safety checks before
          real activation.
      
      Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
      Reviewed-by: NDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180613192600.3955-1-rodrigo.vivi@intel.com
      5422b37c
  19. 13 6月, 2018 1 次提交
  20. 11 6月, 2018 2 次提交
  21. 07 6月, 2018 2 次提交