- 20 9月, 2011 1 次提交
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由 Scott Wood 提交于
u64 is used rather than phys_addr_t to keep things simple, as this is called from assembly code. Update callers to pass a 64-bit address in r3/r4. Other unused register assignments that were once parameters to machine_init are dropped. For FSL BookE, look up the physical address of the device tree from the effective address passed in r3 by the loader. This is required for situations where memory does not start at zero (due to AMP or IOMMU-less virtualization), and thus the IMA doesn't start at zero, and thus the device tree effective address does not equal the physical address. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 19 5月, 2011 2 次提交
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由 Sebastian Siewior 提交于
It seems that Adrian is getting old. He removed almost everything of GEMINI in commit c5365313 ("[POWERPC] Remove the broken Gemini support") except this piece. Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Benjamin Herrenschmidt 提交于
This should fix SMP & Hotplug builds on FSL BookE and 476 Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 01 4月, 2011 1 次提交
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由 Benjamin Herrenschmidt 提交于
Various thing are torn down when a CPU is hot-unplugged. That CPU is expected to go back to start_secondary when re-plugged to re initialize everything, such as clock sources, maps, ... Some implementations just return from cpu_die() callback in the idle loop when the CPU is "re-plugged". This is not enough. We fix it using a little asm trampoline which resets the stack and calls back into start_secondary as if we were all fresh from boot. The trampoline already existed on ppc64, but we add it for ppc32 Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 17 5月, 2010 1 次提交
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由 Alexander Graf 提交于
When an interrupt occurs we don't know yet if we're in guest context or in host context. When in guest context, KVM needs to handle it. So let's pull the same trick we did on Book3S_64: Just add a macro to determine if we're in guest context or not and if so jump on to KVM code. CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAlexander Graf <agraf@suse.de> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 13 12月, 2009 1 次提交
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由 Albert Herranz 提交于
Add support for using the USB Gecko adapter as an early debugging console on the Nintendo GameCube and Wii video game consoles. The USB Gecko is a 3rd party memory card interface adapter that provides a EXI (External Interface) to USB serial converter. Signed-off-by: NAlbert Herranz <albert_herranz@yahoo.es> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 20 8月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
The kernel uses SPRG registers for various purposes, typically in low level assembly code as scratch registers or to hold per-cpu global infos such as the PACA or the current thread_info pointer. We want to be able to easily shuffle the usage of those registers as some implementations have specific constraints realted to some of them, for example, some have userspace readable aliases, etc.. and the current choice isn't always the best. This patch should not change any code generation, and replaces the usage of SPRN_SPRGn everywhere in the kernel with a named replacement and adds documentation next to the definition of the names as to what those are used for on each processor family. The only parts that still use the original numbers are bits of KVM or suspend/resume code that just blindly needs to save/restore all the SPRGs. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 26 6月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
The 32-bit kernel relies on some memory being mapped covering the kernel text,data and bss at least, early during boot before the full MMU setup is done. On 32-bit "classic" processors, this is done using BAT registers. On 601, the size of BATs is limited to 8M and we use 2 of them for that initial mapping. This can become quite tight when enabling features like lockdep, so let's use a 3rd one to bump that mapping from 16M to 24M. We keep the 4th BAT free as it can be useful for debugging early boot code to map things like serial ports. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 12 6月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
The patch that moved to vector.S and made common between 32 and 64-bit the altivec code had a nasty bug on 32-bit (did I really test that ?) which causes the kernel to blr back into userspace ... oops :-) Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 09 6月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
Currently, load_up_altivec and give_up_altivec are duplicated in 32-bit and 64-bit. This creates a common implementation that is moved away from head_32.S, head_64.S and misc_64.S and into vector.S, using the same macros we already use for our common implementation of load_up_fpu. I also moved the VSX code over to vector.S though in that case I didn't make it build on 32-bit (yet). Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 27 4月, 2009 1 次提交
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由 Tim Abbott 提交于
This has the consequence of changing the section name use for head code from ".text.head" to ".head.text". Since this commit changes all users in the architecture, this change should be harmless. Signed-off-by: NTim Abbott <tabbott@mit.edu> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NSam Ravnborg <sam@ravnborg.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 3月, 2009 3 次提交
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由 Kumar Gala 提交于
Complete workaround for DTLB errata in e300c2/c3/c4 processors. Due to the bug, the hardware-implemented LRU algorythm always goes to way 1 of the TLB. This fix implements the proposed software workaround in form of a LRW table for chosing the TLB-way. Based on patch from David Jander <david@protonic.nl> Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
Now that r0 is free we can keep the value of I/DMISS in r3 and not reload it before doing the tlbli/d. This saves us a few cycles in the fast path case. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Kumar Gala 提交于
Long ago we had some code that actually used the CTR in the SW TLB miss handlers (603/e300). Since we don't use it no reason to waste cycles saving it off and restoring it (we actually didn't restore it in the fast path case). Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 23 3月, 2009 1 次提交
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由 Kumar Gala 提交于
Grant picked up the wrong version of "Respect _PAGE_COHERENT on classic ppc32 SW" (commit a4bd6a93) It was missing the code to actually deal with the fixup of _PAGE_COHERENT based on the CPU feature. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 17 3月, 2009 1 次提交
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由 Kumar Gala 提交于
Since we now set _PAGE_COHERENT in the Linux PTE we shouldn't be clearing it out before we setup the SW TLB. Today all the SW TLB machines (603/e300) that we support are non-SMP, however there are some errata on some devices that cause us to set _PAGE_COHERENT via CPU_FTR_NEED_COHERENT. Signed-off-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 11 3月, 2009 1 次提交
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由 Benjamin Herrenschmidt 提交于
CONFIG_PPC_MULTIPLATFORM is a remain of the pre-powerpc days and isn't really meaningful anymore. It was basically equivalent to PPC64 || 6xx. This removes it along with the following changes: - 32-bit platforms that relied on PPC32 && PPC_MULTIPLATFORM now rely on 6xx which is what they want anyway. - A new symbol, PPC_BOOK3S, is defined that represent compliance with the "Server" variant of the architecture. This is set when either 6xx or PPC64 is set and open the door for future BOOK3E 64-bit. - 64-bit platforms that relied on PPC64 && PPC_MULTIPLATFORM now use PPC64 && PPC_BOOK3S - A separate and selectable CONFIG_PPC_OF_BOOT_TRAMPOLINE option is now used to control the use of prom_init.c Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 23 12月, 2008 1 次提交
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由 Dale Farnsworth 提交于
Add the ability for a classic ppc kernel to be loaded at an address of 32MB. This done by fixing a few places that assume we are loaded at address 0, and by changing several uses of KERNELBASE to use PAGE_OFFSET, instead. Signed-off-by: NDale Farnsworth <dale@farnsworth.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 21 12月, 2008 2 次提交
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由 Benjamin Herrenschmidt 提交于
We're soon running out of CPU features and I need to add some new ones for various MMU related bits, so this patch separates the MMU features from the CPU features. I moved over the 32-bit MMU related ones, added base features for MMU type families, but didn't move over any 64-bit only feature yet. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Benjamin Herrenschmidt 提交于
This splits the mmu_context handling between 32-bit hash based processors, 64-bit hash based processors and everybody else. This is preliminary work for adding SMP support for BookE processors. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NKumar Gala <galak@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 15 10月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
prom_init was changed to take a new argument, the address where the kernel is loaded, which is now used to copy the SMP spin loop down before use. However, only head_64.S was adapted to pass this new value, not head_32.S, thus breaking SMP boot on 32-bit SMP CHRP machines. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 25 9月, 2008 1 次提交
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由 Becky Bruce 提交于
This rearranges a bit of code, and adds support for 36-bit physical addressing for configs that use a hashed page table. The 36b physical support is not enabled by default on any config - it must be explicitly enabled via the config system. This patch *only* expands the page table code to accomodate large physical addresses on 32-bit systems and enables the PHYS_64BIT config option for 86xx. It does *not* allow you to boot a board with more than about 3.5GB of RAM - for that, SWIOTLB support is also required (and coming soon). Signed-off-by: NBecky Bruce <becky.bruce@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 18 8月, 2008 1 次提交
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由 Rocky Craig 提交于
The intent of "flush_tlbs" is to invalidate all TLB entries by doing a TLB invalidate instruction for all pages in the address range 0 to 0x00400000. A loop counter is set up at the high value and decremented by page size. However, the loop is only done once as the sense of the conditional branch at the loop end does not match the setup/decrement. This fixes it to do the whole range by correcting the branch condition. Signed-off-by: NRocky Craig <rocky.craig@hp.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 01 7月, 2008 1 次提交
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由 Michael Neuling 提交于
Make load_up_fpu and load_up_altivec callable so they can be reused by the VSX code. Signed-off-by: NMichael Neuling <mikey@neuling.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 18 4月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
This moves various definitions used all over the place to parse stack frames to ptrace.h so only one definition is needed. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 26 2月, 2008 1 次提交
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由 Dale Farnsworth 提交于
This code isn't referenced anywhere, so remove it. Signed-off-by: NDale Farnsworth <dale@farnsworth.org> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 07 12月, 2007 1 次提交
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由 Kumar Gala 提交于
The size of swapper_pg_dir is 8k instead of 4k when using 64-bit PTEs (CONFIG_PTE_64BIT). This was reported by Cedric Hombourger <chombourger@gmail.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 12 10月, 2007 1 次提交
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由 Kumar Gala 提交于
Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or user space address. This mimics how the macro is_kernel_addr() works. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 04 10月, 2007 1 次提交
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由 Scott Wood 提交于
This code assumes that the ports have been previously set up, with buffers in DPRAM. Signed-off-by: NScott Wood <scottwood@freescale.com> Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 19 9月, 2007 1 次提交
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由 Stephen Rothwell 提交于
It is just a C char array, so declare it thusly. Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 14 9月, 2007 1 次提交
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由 Kumar Gala 提交于
We get warnings like the following from the various ppc32 head*.S files: WARNING: vmlinux.o(.text+0x358): Section mismatch: reference to .init.text:early_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x380): Section mismatch: reference to .init.text:machine_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x384): Section mismatch: reference to .init.text:MMU_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3aa): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3ae): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') Added a .text.head section simliar to what other architectures do since modpost already excludes this from its warnings. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 13 9月, 2007 1 次提交
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由 Scott Wood 提交于
Previously, the TLB miss handlers assumed that pages above KERNELBASE are always present and read/write. This assumption is false in the case of CONFIG_DEBUG_PAGEALLOC. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 14 6月, 2007 1 次提交
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由 David Gibson 提交于
APUS (the Amiga Power-Up System) is not supported under arch/powerpc and it's unlikely it ever will be. Therefore, this patch removes the fragments of APUS support code from arch/powerpc which have been copied from arch/ppc. A few APUS references are left in asm-powerpc in .h files which are still used from arch/ppc. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 24 1月, 2007 1 次提交
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由 Adrian Bunk 提交于
Signed-off-by: NAdrian Bunk <bunk@stusta.de> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 08 12月, 2006 1 次提交
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由 Kim Phillips 提交于
The e300c2 has no FPU. Its MSR[FP] is grounded to zero. If an attempt is made to execute a floating point instruction (including floating-point load, store, or move instructions), the e300c2 takes a floating-point unavailable interrupt. This patch adds support for FP emulation on the e300c2 by declaring a new CPU_FTR_FP_TAKES_FPUNAVAIL, where FP unavail interrupts are intercepted and redirected to the ProgramCheck exception path for correct emulation handling. (If we run out of CPU_FTR bits we could look to reclaim this bit by adding support to test the cpu_user_features for PPC_FEATURE_HAS_FPU instead) It adds a nop to the exception path for 32-bit processors with a FPU. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 21 6月, 2006 1 次提交
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由 Jon Loeliger 提交于
Clear the high BATS during load_up_mmu if FTR_HAS_HIGH_BATS. Allow just a bit more time for secondary CPUs to phone home. Signed-off-by: NWei Zhang <Wei.Zhang@freescale.com> Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NJon Loeliger <jdl@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 24 2月, 2006 1 次提交
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由 Alan Curry 提交于
altivec_unavailable_exception is called without setting r3... it looks like the r3 that actually gets passed in as struct pt_regs *regs is the undisturbed value of r3 at the time the altivec instruction was encountered. The user actually gets to choose the pt_regs printed in the Oops! This fixes the oops by passing the correct pt_regs pointer to altivec_unavailable_exception. Signed-off-by: NAlan Curry <pacman@TheWorld.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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- 09 1月, 2006 2 次提交
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由 Paul Mackerras 提交于
The CONFIG_PPC_OF symbol is used to mean that the firmware device tree access functions are available. Since we always have a device tree with ARCH=powerpc, make CONFIG_PPC_OF always Y for ARCH=powerpc. This fixes some compile errors reported by Kumar Gala, but in a different way to his patch. This also makes prom_parse.o be compiled only if CONFIG_PPC_OF so that non-OF ARCH=ppc platforms will compile. Signed-off-by: NPaul Mackerras <paulus@samba.org>
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由 Andy Fleming 提交于
This patch adds oprofile support for the 7450 and all its multitudinous derivatives. * Added 7450 (and derivatives) support for oprofile * Changed e500 cputable to have oprofile model and cpu_type fields * Added support for classic 32-bit performance monitor interrupt * Cleaned up common powerpc oprofile code to be as common as possible * Cleaned up oprofile_impl.h to reflect 32 bit classic code * Added 32-bit MMCRx bitfield definitions and SPR numbers Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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