gpiochip_lock_as_irq() may return a few error codes,
do not shadow them by -ENOSPC and let caller to decide.

No functional change intended.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

gpiochip_lock_as_irq() may return a few error codes,
do not shadow them by -EINVAL and let caller to decide.

No functional change intended.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

gpiochip_lock_as_irq() may return a few error codes,
do not shadow them by -EINVAL and let caller to decide.

No functional change intended.

Cc: Hoan Tran <hotran@apm.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

gpiochip_lock_as_irq() may return a few error codes,
do not shadow them by -EINVAL and let caller to decide.

No functional change intended.

Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

gpiochip_lock_as_irq() may return a few error codes,
do not shadow them by -EINVAL and let caller to decide.

No functional change intended.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec
mute control, can also be used for general purpose. It is manipulated by
the GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI
pins can also be set in the same way.

Currently this GRF GPIO controller only supports the mute pin. If needed
in the future, the HDMI pins support can also be added.
Signed-off-by: NLevin Du <djw@t-chip.com.cn>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This should make applications utilizing whole banks work faster.
Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpio/gpio-pxa.c: In function "pxa_gpio_probe":
drivers/gpio/gpio-pxa.c:629:35: warning:
 variable "gpio_offset" set but not used [-Wunused-but-set-variable]
  int irq0 = 0, irq1 = 0, irq_mux, gpio_offset = 0;
                                   ^
Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

From the datasheet, the GPIO interface is identical to IT8728 (same
description), so just add it to the same case as the other chip.
Signed-off-by: NVincent Prince <vincent.prince.fr@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There should not be anything more than stated by the name of newly
introduced constants, i.e.
	GPIOD_OUT_LOW_OPEN_DRAIN == GPIOD_OUT_LOW + open drain
and nothing more.

Make it better to read and slightly more robust by using GPIOD_OUT_LOW
and GPIOD_OUT_HIGH constants with open drain flag.

No functional change intended.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Since commit e45d1c80 ("gpio: put GPIO IRQs into their own lock
class") and commit a0a8bcf4 ("gpiolib: irqchip: use different
lockdep class for each gpio irqchip") GPIO lib takes care of lockdep
classes. In fact, gpiochip_irq_map() overwrites the class anyway, so
the lockdep class set by the driver is useless. Remove it.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix the following sparse error:

drivers/gpio/gpio-ath79.c:54:16: error: return expression in void function
Signed-off-by: Nzhong jiang <zhongjiang@huawei.com>
Acked-by: NAlban Bedel <albeu@free.fr>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is no need for splitting the writel() call in two lines.

Make it fit into a single line instead.
Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The pxa3xx driver uses the pinctrl-single driver since a while which
does not implement a .gpio_set_direction() callback. The pinmux core
will simply return 0 in this case, and the pxa3xx gpio driver hence
believes the pinctrl driver did its job and returns as well.

This effectively makes pxa_gpio_direction_{input,output} no-ops.

To fix this, do not call into the pinctrl subsystem for the PXA3xx
platform for now. We can revert this once the pinctrl-single driver
learned to support setting pin directions.
Signed-off-by: NDaniel Mack <daniel@zonque.org>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

If ioh_gpio_probe() fails on devm_irq_alloc_descs() then chip may point
to any element of chip_save array, so reverse iteration from pointer chip
may become chip_save[-1] and gpiochip_remove() will operate with wrong
memory.

The patch fix the error path of ioh_gpio_probe() to correctly bypass
chip_save array.

Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: NAnton Vasilyev <vasilyev@ispras.ru>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Actually report the error code from devm_regulator_get() which may as
well just be a probe deferral.

This is e.g. what one gets upon booting a Colibri T20:

gpiochip_add_data_with_key: GPIOs 0..223 (tegra-gpio) failed to register
Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit 36b31279 ("gpiolib: Respect error code of ->get_direction()")
broke tegra_gpio_irq_set_type() because requesting of GPIO direction must
be done after enabling GPIO function for a pin.

This patch fixes drivers probe failure like this:

 gpio gpiochip0: (tegra-gpio): gpiochip_lock_as_irq: cannot get GPIO direction
 tegra-gpio 6000d000.gpio: unable to lock Tegra GPIO 144 as IRQ

Fixes: 36b31279 ("gpiolib: Respect error code of ->get_direction()")
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Acked-by: NJon Hunter <jonathanh@nvidia.com>
Tested-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

GPIO registers could lose context on i.MX7D, when
enter LPSR mode, the whole SoC will be powered off
except LPSR domain, GPIO banks will lose context
in this case, need to restore the context after
resume from LPSR mode.

This patch adds new compatible string for i.MX7D
which supports GPIO power off feature in suspend,
and adds the GPIO save/restore operations in noirq
suspend/resume phase, since GPIO is fundamental
module which could be used by other peripherals'
resume phase.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NMorten Hein Tiljeset <morten.tiljeset@prevas.dk>
Reviewed-by: NSean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

It's actually fine to read values of output lines. This was also
allowed by the legacy sysfs interface.
Signed-off-by: NBartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

User space can currently both read and set values of input lines using
the character device. This was not allowed by the old sysfs interface
nor is it a correct behavior.

Check the first descriptor in the set for the OUT flag when asked to
set values and return -EPERM if the line is input.
Signed-off-by: NBartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Allow gpiolib to read back the current I/O direction configuration by
implementing the .get_direction() callback.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

One line in gpiolib_dbg_show() still fits 80 characters, so,
join it to be like that in order to increase readability.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

platform_get_resource() may fail and return NULL, so we should
better check it's return value to avoid a NULL pointer dereference
a bit later in the code.

This is detected by Coccinelle semantic patch.

@@
expression pdev, res, n, t, e, e1, e2;
@@

res = platform_get_resource(pdev, t, n);
+ if (!res)
+   return -EINVAL;
... when != res == NULL
e = devm_ioremap(e1, res->start, e2);
Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com>
Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Compile-testing the driver fails unless OF_GPIO is enabled:

drivers/gpio/gpio-mt7621.c: In function 'mediatek_gpio_bank_probe':
drivers/gpio/gpio-mt7621.c:228:10: error: 'struct gpio_chip' has no member named 'of_node'

Fixes: 4ba9c3af ("gpio: mt7621: Add a driver for MT7621")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Gcc cannot always see that BUG_ON(1) is guaranteed to not
return, so we get a warning message in some configurations:

drivers/gpio/gpio-aspeed.c: In function 'bank_reg':
drivers/gpio/gpio-aspeed.c:244:1: error: control reaches end of non-void function [-Werror=return-type]

Using a plain BUG() is easier here and avoids the problem.

Fixes: 44ddf559 ("gpio: aspeed: Rework register type accessors")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Two out of three calls to ->get_direction (excluding, of course,
gpiod_get_direction() itself) are using gpiod_get_direction() and
one is still open coded.

Replace the latter one to use same API for sake of consistency.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Since we put static variable to a header file it's copied to each module
that includes the header. But not all of them are actually used it.

Mark gpio_suffixes array with __maybe_unused to hide a compiler warning:

In file included from
drivers/gpio/gpiolib-legacy.c:6:0:
drivers/gpio/gpiolib.h:95:27: warning: ‘gpio_suffixes’ defined but not used [-Wunused-const-variable=]
 static const char * const gpio_suffixes[] = { "gpios", "gpio" };
                           ^~~~~~~~~~~~~
In file included from drivers/gpio/gpiolib-devprop.c:17:0:
drivers/gpio/gpiolib.h:95:27: warning: ‘gpio_suffixes’ defined but not used [-Wunused-const-variable=]
 static const char * const gpio_suffixes[] = { "gpios", "gpio" };
                           ^~~~~~~~~~~~~
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Following logic from commit: 22f6592b, GPIOHANDLE_REQUEST_OUTPUT
should handle errors same way as GPIOHANDLE_REQUEST_INPUT does, or else
the following error occurs:

gpio-mockup-chardev: gpio<gpiochip1> line<0> test flag<0x2> value<0>: No
such file or directory

despite the real result of gpio_pin_test(), gpio_debugfs_get() and
gpiotools_request_linehandle() functions.
Signed-off-by: NRafael David Tinoco <rafael.tinoco@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Avoid replication of error code conversion in non-DT GPIO consumers'
code by returning -EPROBE_DEFER from gpiod_find() in case a chip
identified by its label in a registered lookup table is not ready.

See https://lkml.org/lkml/2018/5/30/176 for example case.
Suggested-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In case we try to lock GPIO pin as IRQ when something going wrong
we print a misleading message.

Correct this by checking an error code from ->get_direction() in
gpiochip_lock_as_irq() and printing a corresponding message.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some i.MX SoCs have GPIO clock gate in CCM, accessing
GPIO registers needs to enable GPIO clock gate first,
i.MX GPIO driver will enable clock gate if there is
clock property in GPIO node of dtb, add optional property
to i.MX GPIO binding doc.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Reviewed-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This fixes some syntactic nits that makes the GPIO maintainer
happier. It is way easier to show by example and do it myself
than to try to explain it with comments. It's just my personal
taste of minimalism.

Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: NeilBrown <neil@brown.name>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add driver support for gpio of MT7621 SoC.
Signed-off-by: NSergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: NNeilBrown <neil@brown.name>
[Switched wording WIDTH to STRIDE]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add a devicetree binding documentation for the mt7621 gpio.
Signed-off-by: NSergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: NNeilBrown <neil@brown.name>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

For easy grepping on debug purposes join string literals back in the
messages.

While here, fix couple of small indentation issues.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

On the Aspeed chip, the GPIOs can be under control of the ARM
chip or of the ColdFire coprocessor. (There's a third command
source, the LPC bus, which we don't use or support yet).

The control of which master is allowed to modify a given
GPIO is per-bank (8 GPIOs).

Unfortunately, systems already exist for which we want to
use GPIOs of both sources in the same bank.

This provides an API exported by the gpio-aspeed driver
that an aspeed coprocessor driver can use to "grab" some
GPIOs for use by the coprocessor, and allow the coprocessor
driver to provide callbacks for arbitrating access.

Once at least one GPIO of a given bank has been "grabbed"
by the coprocessor, the entire bank is marked as being
under coprocessor control. It's command source is switched
to the coprocessor.

If the ARM then tries to write to a GPIO in such a marked bank,
the provided callbacks are used to request access from the
coprocessor driver, which is responsible to doing whatever
is necessary to "pause" the coprocessor or prevent it from
trying to use the GPIOs while the ARM is doing its accesses.

During that time, the command source for the bank is temporarily
switched back to the ARM.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Reviewed-by: NAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds the definitions for the command source registers
and a helper to set them.

Those registers allow to control which bus master on the
SoC is allowed to modify a given bank of GPIOs and will
be used by subsequent patches.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Reviewed-by: NAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Aspeed GPIO hardware has a quirk: the value register, for an
output GPIO, doesn't contain the last value written (the write
latch content) but the sampled input value.

This means that when reading back shortly after writing, you can
get an incorrect value as the input value is delayed by a few
synchronizers.

The HW supports a separate read-only register "Data Read Register"
which allows you to read the write latch instead.

This adds the definition for it, and uses it for the initial
population of the GPIO value cache. It will be used more in
subsequent patches.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Reviewed-by: NAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>