The DSI controllers are powered by a (typically 1.2V) regulator. Usually
this is always on, so there was no need to support enabling or disabling
it thus far. But in order not to consume any power when DSI is inactive,
give the driver a chance to enable or disable the supply as needed.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Revert commit 18ebc0f4 "drm/tegra: hdmi: Enable VDD earlier for
hotplug/DDC" and instead add a new supply for the +5V pin on the HDMI
connector.

The vdd-supply property refers to the regulator that supplies the
AVDD_HDMI input on Tegra, rather than the +5V HDMI connector pin. This
was never a problem before, because all boards had that pin hooked up to
a regulator that was always on. Starting with Dalmore and continuing
with Venice2, the +5V pin is controllable via a GPIO. For reasons
unknown, the GPIO ended up as the controlling GPIO of the AVDD_HDMI
supply in the Dalmore and Venice2 DTS files. But that's not correct.
Instead, a separate supply must be introduced so that the +5V pin can be
controlled separately from the supplies that feed the HDMI block within
Tegra.

A new hdmi-supply property is introduced that takes the place of the
vdd-supply and vdd-supply is only enabled when HDMI is enabled rather
than all the time.
Signed-off-by: NThierry Reding <treding@nvidia.com>

Exynos drm hdmi driver used to get dummy hdmiphy clock to
control the PMU bit for hdmiphy. This bit needs to be set
before setting any resolution to hdmi hardware. This was
handled using dummy hdmiphy clock which is removed here.

PMU is already defined as system controller for exynos
SoCs. Hdmi driver is modified to control the phy enable bit
inside PMU using regmap interfaces.

Devicetree binding document for hdmi is also updated.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Enable support for hdmi for exynos5420 hdmiphy. Add
compatible string in the of_match table. Also added
hdmiphy configuration values for exynos5420.
Signed-off-by: NRahul Sharma <Rahul.Sharma@samsung.com>
Signed-off-by: NShirish S <s.shirish@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Certain bridge chips use a GPIO to indicate the cable status instead
of the I_DP_HPD pin.  This adds an optional device-tree property,
"samsung,hpd-gpio", to the exynos-dp controller which indicates that
the specified GPIO should be used for hotplug detection.
The GPIO is then set up as an edge-triggered interrupt where the
rising edge indicates hotplug-in and the falling edge indicates hotplug-out.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

With the addition of clock-indices, we need to change the renesas
clock implementation to use these instead of the local definition
of "renesas,clock-indices".

Since this will break booting with older device trees, we add a
simple auto-detection of which properties are present.
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Fix aliases syntax in device-tree binding example to avoid
copy-paste errors (the alias would be dropped silently).
Signed-off-by: NJohan Hovold <jhovold@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Since the default DMA ops for arm64 are non-coherent, mark the X-Gene
controller explicitly as dma-coherent to avoid additional cache
maintenance.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Cc: Loc Ho <lho@apm.com>

This is another great example of trainwreck engineering:

commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support)
added support for using EDMA on peripherals which have no direct EDMA
event mapping.

The code compiles and does not explode in your face, but that's it.

1) Reading an u16 array from an u32 device tree array simply does not
   work. Even if the function is named "edma_of_read_u32_to_s16_array".

   It merily calls of_property_read_u16_array. So the resulting 16bit
   array will have every other entry = 0.

2) The DT entry for the xbar registers related to xbar has length 0x10
   instead of the real length: 0xfd0 - 0xf90 = 0x40.

   Not a real problem as it does not cross a page boundary, but
   wrong nevertheless.

3) But none of this matters as the mapping never happens:

   After reading nonsense edma_of_read_u32_to_s16_array() invalidates
   the first array entry pair, so nobody can ever notice the
   braindamage by immediate explosion.

Seems the QA criteria for this code was solely not to explode when
someone adds edma-xbar-event-map entries to the DT. Goal achieved,
congratulations!

Not really helpful if someone wants to use edma on a device which
requires a xbar mapping.

Fix the issues by:

- annotating the device tree entry with "/bits/ 16" as documented in
  the of_property_read_u16_array kernel doc

- make the size of the xbar register mapping correct

- invalidating the end of the array and not the start

This convoluted mess wants to be completely rewritten as there is no
point to keep the xbar_chan array memory and the iomapping of the xbar
regs around forever. Marking the xbar mapped channels as used should
be done right there.

But that's a different issue and this patch is small enough to make it
work and allows a simple backport for stable.

Cc: stable@vger.kernel.org # v3.12+
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

ARM arch timers are tightly coupled with the CPU logic and lose context
on platform implementing HW power management when cores are powered
down at run-time. Marking the arch timers as C3STOP regardless of power
management capabilities causes issues on platforms with no power management,
since in that case the arch timers cannot possibly enter states where the
timer loses context at runtime and therefore can always be used as a high
resolution clockevent device.

In order to fix the C3STOP issue in a way compliant with how real HW
works, this patch adds a boolean property to the arch timer bindings
to define if the arch timer is managed by an always-on power domain.

This power domain is present on all ARM platforms to date, and manages
HW that must not be turned off, whatever the state of other HW
components (eg power controller). On platforms with no power management
capabilities, it is the only power domain present, which encompasses
and manages power supply for all HW components in the system.

If the timer is powered by the always-on power domain, the always-on
property must be present in the bindings which means that the timer cannot
be shutdown at runtime, so it is not a C3STOP clockevent device.
If the timer binding does not contain the always-on property, the timer is
assumed to be power-gateable, hence it must be defined as a C3STOP
clockevent device.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Magnus Damm <damm@opensource.se>
Cc: Marc Carino <marc.ceeeee@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>

This adds ability for the arc_emac to really handle its supplying clock.
To get the needed clock-frequency either a real clock or the previous
clock-frequency property must be provided.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Tested-by: NMax Schwarz <max.schwarz@online.de>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

s/interrupts-names/interrupt-names/g
s/clocks-names/clock-names/g

Some of the binding files and device tree files get this wrong and the
kernel won't be able to pick it up. Fix them up now so that they don't
get widely used.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by : Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: NGrant Likely <grant.likely@linaro.org>

Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
CC: Rob Landley <rob@landley.net>
CC: Andrew Victor <linux@maxim.org.za>
CC: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Acked-by: NBoris BREZILLON <b.brezillon.dev@gmail.com>
[nicolas.ferre@atmel.com: add new at91sam9261 & at91sam9rl]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The driver will not probe if regulators are not provided. Move the regulator
properties to the required section.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Wolfram Sang pointed out that "efm32,$device" is non-standard. So use the
common scheme and prefix device with "efm32-". The old compatible string
is left in place until arch/arm/boot/dts/efm32* is fixed.
Reported-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NWolfram Sang <wsa@the-dreams.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This commit adds the necessary definitions for the PHY layer to
recognize "qsgmii" as a valid PHY interface. A QSMII interface, as
defined at
http://en.wikipedia.org/wiki/Media_Independent_Interface#Quad_Serial_Gigabit_Media_Independent_Interface,
is "is a method of combining four SGMII lines into a 5Gbit/s
interface. QSGMII, like SGMII, uses LVDS signalling for the TX and RX
data and a single LVDS clock signal. QSGMII uses significantly fewer
signal lines than four SGMII busses."

This type of MAC <-> PHY connection might require special handling on
the MAC driver side, so it should be possible to express this type of
MAC <-> PHY connection, for example in the Device Tree.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add vendor prefix for EBV Elektronik.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NRob Herring <robh@kernel.org>

Using "digi" for Digi International Inc.
Additionally, this patch keep "dlink" entry sorted alphabetically.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NRob Herring <robh@kernel.org>

Add a number of eeproms and temperature sensors/fan controllers used
by kirkwood boards.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRob Herring <robh@kernel.org>

Add a number of vendor prefixes by kirkwood devices. These are not all
stock tickers, but have been in use for a while so changing would not
be easy.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRob Herring <robh@kernel.org>

Marvell Kirkwood SoC binding have not yet been documented. Add the
documentation including the supported SoCs and boards.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Signed-off-by: NRob Herring <robh@kernel.org>

Newhaven Display provides the worldwide marketplace with cost
effective high quality display devices ranging from OLED and LCD
Displays to VFD Displays.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Signed-off-by: NRob Herring <robh@kernel.org>

Add i2se to the list of DT vendor prefixes.
Signed-off-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NRob Herring <robh@kernel.org>

This trivial patch adds ISEE 2007 S.L. to the list of
devicetree vendor prefixes.
Acked-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NRob Herring <robh@kernel.org>

Fixed the missing comma in DT node example.
Signed-off-by: NSherman Yin <syin@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NDenis Carikli <denis@eukrea.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

If "efm32,location" property is not provided, keeping what is already
configured in the hardware, so its either the reset default 0 or whatever
the bootloader did.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Add device tree binding documentation for the Cadence I2C controller.
Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The patch adds bindings for ld9040 panel.
Bindings describe panel resources, boot delays,
display timings and physical size.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch adds bindings for s6e8aa0 panel.
Bindings describes panel resources, boot delays,
display timings, orientation and physical size.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The patch adds DT bindings for Exynos DSI Master. DSIM follows rules
for DSI bus host bindings [1].
Properties describes its resources: memory, interrupt, clocks,
phy, regulators, frequencies of clocks and video interfaces.

[1]: Documentation/devicetree/bindings/mipi/dsi/mipi-dsi-bus.txt
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

A lot of bindings where changed without an update of the binding
documentation. This patch adds those changes to the documentation.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Signed-off-by: NMark Brown <broonie@linaro.org>

Add support for eDP functionality found on Tegra124 and later SoCs. Only
fast link training is currently supported.
Signed-off-by: NThierry Reding <treding@nvidia.com>

This panel is used by Tegra Note 7 and supported by the simple-panel
driver.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

This panel is used by the NVIDIA SHIELD and supported by the
simple-panel driver.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>

The LP129QE LCD has an LED backlight and a display resolution of
2560x1700 pixels.
Signed-off-by: NThierry Reding <treding@nvidia.com>

The Allwinner A10 compatibles were following a slightly different
compatible patterns than the rest of the SoCs for historical reasons.
Change the compatibles to match the other pattern in the RTC driver for
consistency.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Fix dt compatible string in the binding document which was changed
during review in the driver, but it seem I messed up to adapt the
documentation accordingly.

Also change status from "disabled" to "ok" which makes more sense for an
example.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The ARMv8 code will reject incomplete topologies that omit some CPUs (and it's
not clear that it's ever sensible to do so). Update the binding document to
make this clear.

Since we're reformatting the text also fix incorrect grammar in the
final "Any other configuration..." section by removing "consider".
Signed-off-by: NMark Brown <broonie@linaro.org>
Acked-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This patch does not alter the binding at all it only brings the
documentation up to date with the existing binding.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>