1. 09 8月, 2010 1 次提交
  2. 05 8月, 2010 1 次提交
  3. 03 8月, 2010 2 次提交
  4. 02 8月, 2010 1 次提交
  5. 23 7月, 2010 1 次提交
    • S
      xen: Xen PCI platform device driver. · 183d03cc
      Stefano Stabellini 提交于
      Add the xen pci platform device driver that is responsible
      for initializing the grant table and xenbus in PV on HVM mode.
      Few changes to xenbus and grant table are necessary to allow the delayed
      initialization in HVM mode.
      Grant table needs few additional modifications to work in HVM mode.
      
      The Xen PCI platform device raises an irq every time an event has been
      delivered to us. However these interrupts are only delivered to vcpu 0.
      The Xen PCI platform interrupt handler calls xen_hvm_evtchn_do_upcall
      that is a little wrapper around __xen_evtchn_do_upcall, the traditional
      Xen upcall handler, the very same used with traditional PV guests.
      
      When running on HVM the event channel upcall is never called while in
      progress because it is a normal Linux irq handler (and we cannot switch
      the irq chip wholesale to the Xen PV ones as we are running QEMU and
      might have passed in PCI devices), therefore we cannot be sure that
      evtchn_upcall_pending is 0 when returning.
      For this reason if evtchn_upcall_pending is set by Xen we need to loop
      again on the event channels set pending otherwise we might loose some
      event channel deliveries.
      Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
      Signed-off-by: NSheng Yang <sheng@linux.intel.com>
      Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      183d03cc
  6. 02 7月, 2010 1 次提交
  7. 08 6月, 2010 1 次提交
  8. 19 5月, 2010 2 次提交
    • V
      Add support for Westmere to i7core_edac driver · bd9e19ca
      Vernon Mauery 提交于
      This adds new PCI IDs for the Westmere's memory controller
      devices and modifies the i7core_edac driver to be able to
      probe both Nehalem and Westmere processors.
      Signed-off-by: NVernon Mauery <vernux@us.ibm.com>
      Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      bd9e19ca
    • M
      i7core_edac: Add support for X5670 · ac1ecece
      Mauro Carvalho Chehab 提交于
      As reported by Vernon Mauery <vernux@us.ibm.com>, X5670 (Westmere-EP) uses a
      different register for one of the uncore PCI devices. Add support for
      it.
      
      Those are the PCI ID's on this new chipset:
      
      fe:00.0 0600: 8086:2c70 (rev 02)
      fe:00.1 0600: 8086:2d81 (rev 02)
      fe:02.0 0600: 8086:2d90 (rev 02)
      fe:02.1 0600: 8086:2d91 (rev 02)
      fe:02.2 0600: 8086:2d92 (rev 02)
      fe:02.3 0600: 8086:2d93 (rev 02)
      fe:02.4 0600: 8086:2d94 (rev 02)
      fe:02.5 0600: 8086:2d95 (rev 02)
      fe:03.0 0600: 8086:2d98 (rev 02)
      fe:03.1 0600: 8086:2d99 (rev 02)
      fe:03.2 0600: 8086:2d9a (rev 02)
      fe:03.4 0600: 8086:2d9c (rev 02)
      fe:04.0 0600: 8086:2da0 (rev 02)
      fe:04.1 0600: 8086:2da1 (rev 02)
      fe:04.2 0600: 8086:2da2 (rev 02)
      fe:04.3 0600: 8086:2da3 (rev 02)
      fe:05.0 0600: 8086:2da8 (rev 02)
      fe:05.1 0600: 8086:2da9 (rev 02)
      fe:05.2 0600: 8086:2daa (rev 02)
      fe:05.3 0600: 8086:2dab (rev 02)
      fe:06.0 0600: 8086:2db0 (rev 02)
      fe:06.1 0600: 8086:2db1 (rev 02)
      fe:06.2 0600: 8086:2db2 (rev 02)
      fe:06.3 0600: 8086:2db3 (rev 02)
      (as usual, the same PCI devices repeat at ff: bus)
      
      The PCI device 8086:2c70 is shown as:
      
      fe:00.0 Host bridge: Intel Corporation QuickPath Architecture Generic
      Non-core Registers (rev 02)
      
      So, for this device to be recognized, it is only a matter of adding this
      new PCI ID to the driver.
      Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
      ac1ecece
  9. 12 5月, 2010 1 次提交
  10. 10 5月, 2010 7 次提交
  11. 03 3月, 2010 2 次提交
  12. 25 2月, 2010 1 次提交
  13. 23 2月, 2010 1 次提交
  14. 05 12月, 2009 1 次提交
  15. 04 12月, 2009 1 次提交
  16. 21 11月, 2009 1 次提交
  17. 12 11月, 2009 1 次提交
  18. 07 11月, 2009 1 次提交
  19. 29 10月, 2009 2 次提交
  20. 24 10月, 2009 1 次提交
  21. 16 10月, 2009 1 次提交
  22. 08 10月, 2009 1 次提交
  23. 19 9月, 2009 1 次提交
  24. 18 9月, 2009 1 次提交
  25. 11 9月, 2009 2 次提交
  26. 10 9月, 2009 1 次提交
  27. 09 9月, 2009 1 次提交
  28. 02 9月, 2009 1 次提交
    • B
      powerpc: Fix some late PowerMac G5 with PCIe ATI graphics · cede3930
      Benjamin Herrenschmidt 提交于
      A misconfiguration by the firmware of the U4 PCIe bridge on PowerMac G5
      with the U4 bridge (latest generations, may also affect the iMac G5
      "iSight") is causing us to re-assign the PCI BARs of the video card,
      which can get it out of sync with the firmware, thus breaking offb.
      
      This works around it by fixing up the bridge configuration properly
      at boot time. It also fixes a bug where the firmware provides us with
      an incorrect set of accessible regions in the device-tree.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      cede3930
  29. 30 8月, 2009 1 次提交