1. 30 6月, 2010 1 次提交
  2. 29 6月, 2010 1 次提交
  3. 22 4月, 2010 1 次提交
  4. 04 4月, 2010 1 次提交
  5. 02 4月, 2010 1 次提交
  6. 31 3月, 2010 1 次提交
  7. 18 2月, 2010 1 次提交
  8. 13 2月, 2010 1 次提交
  9. 04 2月, 2010 1 次提交
    • A
      net: macvtap driver · 20d29d7a
      Arnd Bergmann 提交于
      In order to use macvlan with qemu and other tools that require
      a tap file descriptor, the macvtap driver adds a small backend
      with a character device with the same interface as the tun
      driver, with a minimum set of features.
      
      Macvtap interfaces are created in the same way as macvlan
      interfaces using ip link, but the netif is just used as a
      handle for configuration and accounting, while the data
      goes through the chardev. Each macvtap interface has its
      own character device, simplifying permission management
      significantly over the generic tun/tap driver.
      
      Cc: Patrick McHardy <kaber@trash.net>
      Cc: Stephen Hemminger <shemminger@linux-foundation.org>
      Cc: David S. Miller" <davem@davemloft.net>
      Cc: "Michael S. Tsirkin" <mst@redhat.com>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Cc: Or Gerlitz <ogerlitz@voltaire.com>
      Cc: netdev@vger.kernel.org
      Cc: bridge@lists.linux-foundation.org
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      20d29d7a
  10. 16 1月, 2010 1 次提交
  11. 11 1月, 2010 1 次提交
  12. 17 12月, 2009 1 次提交
    • D
      NET: Add Ethernet driver for Octeon MGMT devices. · d6aa60a1
      David Daney 提交于
      The Octeon MGMT Ethernet ports are present in some members of the
      Octeon SOC family (cn52XX and cn56XX have them).
      
      The mdio bus connected to the MGMT PHYs is shared with the main
      octeon-ethernet driver, we force it to be loaded first by calling
      octeon_mdiobus_force_mod_depencency.  The platform devices for the
      MGMT Ethernet ports are added in
      arch/mips/cavium-octeon/octeon-platform.c, and the register
      definitions for the ports live in arch/mips/include/asm/octeon/ along
      with their ilk.
      
      Although it currently is the only driver in drivers/net/octeon, the
      directory was created looking forward to the day that octeon-ethernet
      will move there from its current home in drivers/staging.
      Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
      Acked-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      d6aa60a1
  13. 15 10月, 2009 1 次提交
  14. 13 10月, 2009 1 次提交
  15. 10 10月, 2009 1 次提交
  16. 01 10月, 2009 1 次提交
  17. 18 9月, 2009 1 次提交
  18. 20 8月, 2009 1 次提交
  19. 20 7月, 2009 1 次提交
  20. 22 6月, 2009 1 次提交
  21. 09 6月, 2009 1 次提交
  22. 08 6月, 2009 1 次提交
  23. 26 5月, 2009 1 次提交
  24. 19 5月, 2009 1 次提交
  25. 30 4月, 2009 1 次提交
  26. 27 4月, 2009 1 次提交
    • G
      net: add Xilinx ll_temac device driver · 92744989
      Grant Likely 提交于
      This patch adds support for the Xilinx ll_temac 10/100/1000 Ethernet
      device.  The ll_temac ipcore is typically used on Xilinx Virtex and
      Spartan designs attached to either a PowerPC 4xx or Microblaze
      processor.
      
      At the present moment, this driver only works with Virtex5 PowerPC
      designs because it assumes DCR is used to access the DMA registers.
      However, the low level access to DMA registers is abstracted and
      it should be easy to adapt for the other implementations.
      
      I'm posting this driver now as an RFC.  There are still some things that
      need to be tightened up, but it does appear to be stable.
      
      Derived from driver code written by Yoshio Kashiwagi and David H. Lynch Jr.
      
      Tested on Xilinx ML507 eval board with Base System Builder generated
      FPGA design.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      Acked-by: NAndy Fleming <afleming@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      92744989
  27. 09 4月, 2009 1 次提交
  28. 02 4月, 2009 1 次提交
  29. 27 3月, 2009 1 次提交
  30. 12 3月, 2009 2 次提交
  31. 19 2月, 2009 1 次提交
  32. 05 2月, 2009 1 次提交
  33. 08 1月, 2009 1 次提交
  34. 12 12月, 2008 1 次提交
  35. 04 12月, 2008 3 次提交
  36. 03 12月, 2008 1 次提交
  37. 22 11月, 2008 1 次提交
    • R
      net/hp-plus: fix link errors · 38ae07e4
      Randy Dunlap 提交于
      Fix hp-plus driver link errors.
      Builds as loadable module and kernel image driver.
      All drivers that use 8390.o or 8390p.o that will build on
      i386 with MCA/PCI/EISA/ISA were built successfully both
      =m and =y.
      
      drivers/built-in.o: In function `hpp_open':
      hp-plus.c:(.text+0xac06c): undefined reference to `eip_interrupt'
      hp-plus.c:(.text+0xac0d7): undefined reference to `eip_open'
      drivers/built-in.o: In function `hpp_close':
      hp-plus.c:(.text+0xac1bb): undefined reference to `eip_close'
      drivers/built-in.o: In function `hpp_probe1':
      hp-plus.c:(.init.text+0xa98a): undefined reference to `NS8390p_init'
      drivers/built-in.o: In function `hp_plus_probe':
      (.init.text+0xa9fe): undefined reference to `__alloc_eip_netdev'
      Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      38ae07e4