1. 18 4月, 2015 1 次提交
  2. 13 4月, 2015 1 次提交
  3. 13 2月, 2015 1 次提交
    • A
      all arches, signal: move restart_block to struct task_struct · f56141e3
      Andy Lutomirski 提交于
      If an attacker can cause a controlled kernel stack overflow, overwriting
      the restart block is a very juicy exploit target.  This is because the
      restart_block is held in the same memory allocation as the kernel stack.
      
      Moving the restart block to struct task_struct prevents this exploit by
      making the restart_block harder to locate.
      
      Note that there are other fields in thread_info that are also easy
      targets, at least on some architectures.
      
      It's also a decent simplification, since the restart code is more or less
      identical on all architectures.
      
      [james.hogan@imgtec.com: metag: align thread_info::supervisor_stack]
      Signed-off-by: NAndy Lutomirski <luto@amacapital.net>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Al Viro <viro@zeniv.linux.org.uk>
      Cc: "H. Peter Anvin" <hpa@zytor.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Kees Cook <keescook@chromium.org>
      Cc: David Miller <davem@davemloft.net>
      Acked-by: NRichard Weinberger <richard@nod.at>
      Cc: Richard Henderson <rth@twiddle.net>
      Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
      Cc: Matt Turner <mattst88@gmail.com>
      Cc: Vineet Gupta <vgupta@synopsys.com>
      Cc: Russell King <rmk@arm.linux.org.uk>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
      Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
      Cc: Steven Miao <realmz6@gmail.com>
      Cc: Mark Salter <msalter@redhat.com>
      Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
      Cc: Mikael Starvik <starvik@axis.com>
      Cc: Jesper Nilsson <jesper.nilsson@axis.com>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Richard Kuo <rkuo@codeaurora.org>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
      Cc: Helge Deller <deller@gmx.de>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
      Tested-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
      Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Chen Liqin <liqin.linux@gmail.com>
      Cc: Lennox Wu <lennox.wu@gmail.com>
      Cc: Chris Metcalf <cmetcalf@ezchip.com>
      Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
      Cc: Chris Zankel <chris@zankel.net>
      Cc: Max Filippov <jcmvbkbc@gmail.com>
      Cc: Oleg Nesterov <oleg@redhat.com>
      Cc: Guenter Roeck <linux@roeck-us.net>
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f56141e3
  4. 24 5月, 2014 1 次提交
  5. 08 5月, 2014 1 次提交
  6. 14 11月, 2013 1 次提交
  7. 14 8月, 2013 1 次提交
    • C
      tile: fast-path unaligned memory access for tilegx · 2f9ac29e
      Chris Metcalf 提交于
      This change enables unaligned userspace memory access via a kernel
      fast path on tilegx.  The kernel tracks user PC/instruction pairs
      per-thread using a direct-mapped cache in userspace.  The cache
      maps those PC/instruction pairs to JIT'ed instruction sequences that
      load or store using byte-wide load store intructions and then
      synthesize 2-, 4- or 8-byte load or store results.  Once an
      instruction has been seen to generate an unaligned access once,
      subsequent hits on that instruction typically require overhead
      of only around 50 cycles if cache and TLB is hot.
      
      We support the prctl() PR_GET_UNALIGN / PR_SET_UNALIGN sys call to
      enable or disable unaligned fixups on a per-process basis.
      
      To do this we pull some of the tilepro unaligned support out of the
      single_step.c file; tilepro uses instruction disassembly for both
      single-step and unaligned access support.  Since tilegx actually has
      hardware singlestep support, though, it's cleaner to keep the tilegx
      unaligned access code in a separate file.  While we're at it,
      properly rename the tilepro-specific types, etc., to have tilepro
      suffixes instead of generic tile suffixes.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      2f9ac29e
  8. 08 4月, 2013 1 次提交
  9. 23 3月, 2013 1 次提交
  10. 06 6月, 2012 1 次提交
  11. 02 6月, 2012 2 次提交
  12. 17 5月, 2012 1 次提交
    • C
      arch/tile: fix up some issues in calling do_work_pending() · fc327e26
      Chris Metcalf 提交于
      First, we were at risk of handling thread-info flags, in particular
      do_signal(), when returning from kernel space.  This could happen
      after a failed kernel_execve(), or when forking a kernel thread.
      The fix is to test in do_work_pending() for user_mode() and return
      immediately if so; we already had this test for one of the flags,
      so I just hoisted it to the top of the function.
      
      Second, if a ptraced process updated the callee-saved registers
      in the ptregs struct and then processed another thread-info flag, we
      would overwrite the modifications with the original callee-saved
      registers.  To fix this, we add a register to note if we've already
      saved the registers once, and skip doing it on additional passes
      through the loop.  To avoid a performance hit from the couple of
      extra instructions involved, I modified the GET_THREAD_INFO() macro
      to be guaranteed to be one instruction, then bundled it with adjacent
      instructions, yielding an overall net savings.
      Reported-By: NAl Viro <viro@ZenIV.linux.org.uk>
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      fc327e26
  13. 08 5月, 2012 1 次提交
  14. 03 5月, 2011 1 次提交
    • C
      arch/tile: support TIF_NOTIFY_RESUME · 313ce674
      Chris Metcalf 提交于
      This support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc.
      The change is slightly more complex than the minimal thing, since
      I took advantage of having to go into the assembly code to just
      move a bunch of stuff into C code: specifically, the schedule(),
      do_async_page_fault(), do_signal(), and single_step_once() support,
      in addition to the TIF_NOTIFY_RESUME support.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      313ce674
  15. 23 3月, 2011 1 次提交
  16. 11 3月, 2011 1 次提交
    • C
      arch/tile: support 4KB page size as well as 64KB · 76c567fb
      Chris Metcalf 提交于
      The Tilera architecture traditionally supports 64KB page sizes
      to improve TLB utilization and improve performance when the
      hardware is being used primarily to run a single application.
      
      For more generic server scenarios, it can be beneficial to run
      with 4KB page sizes, so this commit allows that to be specified
      (by modifying the arch/tile/include/hv/pagesize.h header).
      
      As part of this change, we also re-worked the PTE management
      slightly so that PTE writes all go through a __set_pte() function
      where we can do some additional validation.  The set_pte_order()
      function was eliminated since the "order" argument wasn't being used.
      
      One bug uncovered was in the PCI DMA code, which wasn't properly
      flushing the specified range.  This was benign with 64KB pages,
      but with 4KB pages we were getting some larger flushes wrong.
      
      The per-cpu memory reservation code also needed updating to
      conform with the newer percpu stuff; before it always chose 64KB,
      and that was always correct, but with 4KB granularity we now have
      to pay closer attention and reserve the amount of memory that will
      be requested when the percpu code starts allocating.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      76c567fb
  17. 07 7月, 2010 2 次提交
    • C
      arch/tile: catch up on various minor cleanups. · ef06f55a
      Chris Metcalf 提交于
      None of these changes fix any actual bugs, but are just various cleanups
      that fell out along the way.  In particular, some unused #defines and
      includes are removed, PREFETCH_STRIDE is added (the default is right for
      our shipping chips, but wrong for our next generation), our tile-specific
      prefetching code is removed so the (identical) generic prefetching code
      can be used instead, a comment is fixed to be proper GPL and not just a
      "paste GPL here" token, a "//" comment is converted to "/* */", etc.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      ef06f55a
    • C
      arch/tile: Miscellaneous cleanup changes. · 0707ad30
      Chris Metcalf 提交于
      This commit is primarily changes caused by reviewing "sparse"
      and "checkpatch" output on our sources, so is somewhat noisy, since
      things like "printk() -> pr_err()" (or whatever) throughout the
      codebase tend to get tedious to read.  Rather than trying to tease
      apart precisely which things changed due to which type of code
      review, this commit includes various cleanups in the code:
      
      - sparse: Add declarations in headers for globals.
      - sparse: Fix __user annotations.
      - sparse: Using gfp_t consistently instead of int.
      - sparse: removing functions not actually used.
      - checkpatch: Clean up printk() warnings by using pr_info(), etc.;
        also avoid partial-line printks except in bootup code.
        - checkpatch: Use exposed structs rather than typedefs.
        - checkpatch: Change some C99 comments to C89 comments.
      
      In addition, a couple of minor other changes are rolled in
      to this commit:
      
      - Add support for a "raise" instruction to cause SIGFPE, etc., to be raised.
      - Remove some compat code that is unnecessary when we fully eliminate
        some of the deprecated syscalls from the generic syscall ABI.
      - Update the tile_defconfig to reflect current config contents.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      0707ad30
  18. 05 6月, 2010 1 次提交