1. 24 7月, 2018 1 次提交
    • A
      powerpc/mm: Check memblock_add against MAX_PHYSMEM_BITS range · 6aba0c84
      Aneesh Kumar K.V 提交于
      With SPARSEMEM config enabled, we make sure that we don't add sections beyond
      MAX_PHYSMEM_BITS range. This results in not building vmemmap mapping for
      range beyond max range. But our memblock layer looks the device tree and create
      mapping for the full memory range. Prevent this by checking against
      MAX_PHSYSMEM_BITS when doing memblock_add.
      
      We don't do similar check for memeblock_reserve_range. If reserve range is beyond
      MAX_PHYSMEM_BITS we expect that to be configured with 'nomap'. Any other
      reserved range should come from existing memblock ranges which we already
      filtered while adding.
      
      This avoids crash as below when running on a system with system ram config above
      MAX_PHSYSMEM_BITS
      
       Unable to handle kernel paging request for data at address 0xc00a001000000440
       Faulting instruction address: 0xc000000001034118
       cpu 0x0: Vector: 300 (Data Access) at [c00000000124fb30]
           pc: c000000001034118: __free_pages_bootmem+0xc0/0x1c0
           lr: c00000000103b258: free_all_bootmem+0x19c/0x22c
           sp: c00000000124fdb0
          msr: 9000000002001033
          dar: c00a001000000440
        dsisr: 40000000
         current = 0xc00000000120dd00
         paca    = 0xc000000001f60000^I irqmask: 0x03^I irq_happened: 0x01
           pid   = 0, comm = swapper
       [c00000000124fe20] c00000000103b258 free_all_bootmem+0x19c/0x22c
       [c00000000124fee0] c000000001010a68 mem_init+0x3c/0x5c
       [c00000000124ff00] c00000000100401c start_kernel+0x298/0x5e4
       [c00000000124ff90] c00000000000b57c start_here_common+0x1c/0x520
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      6aba0c84
  2. 11 5月, 2018 1 次提交
  3. 30 3月, 2018 2 次提交
  4. 13 3月, 2018 1 次提交
  5. 16 1月, 2018 1 次提交
    • N
      powerpc/mm: Separate ibm, dynamic-memory data from DT format · 6c6ea537
      Nathan Fontenot 提交于
      We currently have code to parse the dynamic reconfiguration LMB
      information from the ibm,dynamic-meory device tree property in
      multiple locations; numa.c, prom.c, and pseries/hotplug-memory.c.
      In anticipation of adding support for a version 2 of the
      ibm,dynamic-memory property this patch aims to separate the device
      tree information from the device tree format.
      
      Doing this requires a two step process to avoid a possibly very large
      bootmem allocation early in boot. During initial boot, new routines
      are provided to walk the device tree property and make a call-back
      for each LMB.
      
      The second step (introduced in later patches) will allocate an
      array of LMB information that can be used directly without needing
      to know the DT format.
      
      This approach provides the benefit of consolidating the device tree
      property parsing to a single location and (eventually) providing
      a common data structure for retrieving LMB information.
      
      This patch introduces a routine to walk the ibm,dynamic-memory
      property in the flattened device tree and updates the prom.c code
      to use this to initialize memory.
      Signed-off-by: NNathan Fontenot <nfont@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      6c6ea537
  6. 06 11月, 2017 1 次提交
    • M
      powerpc/64s: Replace CONFIG_PPC_STD_MMU_64 with CONFIG_PPC_BOOK3S_64 · 4e003747
      Michael Ellerman 提交于
      CONFIG_PPC_STD_MMU_64 indicates support for the "standard" powerpc MMU
      on 64-bit CPUs. The "standard" MMU refers to the hash page table MMU
      found in "server" processors, from IBM mainly.
      
      Currently CONFIG_PPC_STD_MMU_64 is == CONFIG_PPC_BOOK3S_64. While it's
      annoying to have two symbols that always have the same value, it's not
      quite annoying enough to bother removing one.
      
      However with the arrival of Power9, we now have the situation where
      CONFIG_PPC_STD_MMU_64 is enabled, but the kernel is running using the
      Radix MMU - *not* the "standard" MMU. So it is now actively confusing
      to use it, because it implies that code is disabled or inactive when
      the Radix MMU is in use, however that is not necessarily true.
      
      So s/CONFIG_PPC_STD_MMU_64/CONFIG_PPC_BOOK3S_64/, and do some minor
      formatting updates of some of the affected lines.
      
      This will be a pain for backports, but c'est la vie.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      4e003747
  7. 21 10月, 2017 1 次提交
    • M
      powerpc/powernv: Enable TM without suspend if possible · 54820530
      Michael Ellerman 提交于
      Some Power9 revisions can run in a mode where TM operates without
      suspended state. If we find ourself on a CPU that might be in this
      mode, we query OPAL to check, and if so we reenable TM in CPU
      features, and enable a new user feature to signal to userspace that we
      are in this mode.
      
      We do not enable the "normal" user feature, PPC_FEATURE2_HTM, but we
      do enable PPC_FEATURE2_HTM_NOSC because that indicates to userspace
      that the kernel will abort transactions on syscall entry, which is
      true regardless of the suspend mode.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      54820530
  8. 20 10月, 2017 1 次提交
    • C
      powerpc/tm: Add commandline option to disable hardware transactional memory · 07fd1761
      Cyril Bur 提交于
      Currently the kernel relies on firmware to inform it whether or not the
      CPU supports HTM and as long as the kernel was built with
      CONFIG_PPC_TRANSACTIONAL_MEM=y then it will allow userspace to make
      use of the facility.
      
      There may be situations where it would be advantageous for the kernel
      to not allow userspace to use HTM, currently the only way to achieve
      this is to recompile the kernel with CONFIG_PPC_TRANSACTIONAL_MEM=n.
      
      This patch adds a simple commandline option so that HTM can be
      disabled at boot time.
      Signed-off-by: NCyril Bur <cyrilbur@gmail.com>
      [mpe: Simplify to a bool, move to prom.c, put doco in the right place.
       Always disable, regardless of initial state, to avoid user confusion.]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      07fd1761
  9. 25 5月, 2017 1 次提交
    • M
      powerpc: Fix booting P9 hash with CONFIG_PPC_RADIX_MMU=N · d957fb4d
      Michael Neuling 提交于
      Currently if you disable CONFIG_PPC_RADIX_MMU you'll crash on boot on
      a P9. This is because we still set MMU_FTR_TYPE_RADIX via
      ibm,pa-features and MMU_FTR_TYPE_RADIX is what's used for code patching
      in much of the asm code (ie. slb_miss_realmode)
      
      This patch fixes the problem by stopping MMU_FTR_TYPE_RADIX from being
      set from ibm.pa-features.
      
      We may eventually end up removing the CONFIG_PPC_RADIX_MMU option
      completely but until then this fixes the issue.
      
      Fixes: 17a3dd2f ("powerpc/mm/radix: Use firmware feature to enable Radix MMU")
      Cc: stable@vger.kernel.org # v4.7+
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      d957fb4d
  10. 09 5月, 2017 1 次提交
  11. 11 4月, 2017 1 次提交
  12. 30 11月, 2016 1 次提交
  13. 18 11月, 2016 1 次提交
    • M
      powerpc/64: Used named initialisers for ibm_pa_features · e9eb0278
      Michael Ellerman 提交于
      The ibm_pa_features array consists of structures that describe which bit
      and byte in the ibm,pa-features property toggles one or more flags in
      either the CPU, MMU, or user visible feature flags.
      
      Each one consists of 7 values, which are all unsigned long, int or char,
      meaning the compiler gives us no warning if we assign the wrong values
      to the wrong elements. In fact we have had a bug here in the past, where
      we were setting incorrect bits, see commit 6997e57d ("powerpc:
      scan_features() updates incorrect bits for REAL_LE").
      
      So switch to using named initialisers for the structure elements, to
      reduce the likelihood of future bugs, and hopefully improve readability
      also.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Reviewed-by: NBalbir Singh <bsingharora@gmail.com>
      e9eb0278
  14. 01 8月, 2016 3 次提交
  15. 21 7月, 2016 2 次提交
  16. 17 7月, 2016 1 次提交
  17. 11 7月, 2016 1 次提交
  18. 11 5月, 2016 1 次提交
  19. 18 4月, 2016 3 次提交
    • A
      powerpc: Update TM user feature bits in scan_features() · 4705e024
      Anton Blanchard 提交于
      We need to update the user TM feature bits (PPC_FEATURE2_HTM and
      PPC_FEATURE2_HTM) to mirror what we do with the kernel TM feature
      bit.
      
      At the moment, if firmware reports TM is not available we turn off
      the kernel TM feature bit but leave the userspace ones on. Userspace
      thinks it can execute TM instructions and it dies trying.
      
      This (together with a QEMU patch) fixes PR KVM, which doesn't currently
      support TM.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      4705e024
    • A
      powerpc: Update cpu_user_features2 in scan_features() · beff8237
      Anton Blanchard 提交于
      scan_features() updates cpu_user_features but not cpu_user_features2.
      
      Amongst other things, cpu_user_features2 contains the user TM feature
      bits which we must keep in sync with the kernel TM feature bit.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      beff8237
    • A
      powerpc: scan_features() updates incorrect bits for REAL_LE · 6997e57d
      Anton Blanchard 提交于
      The REAL_LE feature entry in the ibm_pa_feature struct is missing an MMU
      feature value, meaning all the remaining elements initialise the wrong
      values.
      
      This means instead of checking for byte 5, bit 0, we check for byte 0,
      bit 0, and then we incorrectly set the CPU feature bit as well as MMU
      feature bit 1 and CPU user feature bits 0 and 2 (5).
      
      Checking byte 0 bit 0 (IBM numbering), means we're looking at the
      "Memory Management Unit (MMU)" feature - ie. does the CPU have an MMU.
      In practice that bit is set on all platforms which have the property.
      
      This means we set CPU_FTR_REAL_LE always. In practice that seems not to
      matter because all the modern cpus which have this property also
      implement REAL_LE, and we've never needed to disable it.
      
      We're also incorrectly setting MMU feature bit 1, which is:
      
        #define MMU_FTR_TYPE_8xx		0x00000002
      
      Luckily the only place that looks for MMU_FTR_TYPE_8xx is in Book3E
      code, which can't run on the same cpus as scan_features(). So this also
      doesn't matter in practice.
      
      Finally in the CPU user feature mask, we're setting bits 0 and 2. Bit 2
      is not currently used, and bit 0 is:
      
        #define PPC_FEATURE_PPC_LE		0x00000001
      
      Which says the CPU supports the old style "PPC Little Endian" mode.
      Again this should be harmless in practice as no 64-bit CPUs implement
      that mode.
      
      Fix the code by adding the missing initialisation of the MMU feature.
      
      Also add a comment marking CPU user feature bit 2 (0x4) as reserved. It
      would be unsafe to start using it as old kernels incorrectly set it.
      
      Fixes: 44ae3ab3 ("powerpc: Free up some CPU feature bits by moving out MMU-related features")
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Cc: stable@vger.kernel.org
      [mpe: Flesh out changelog, add comment reserving 0x4]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      6997e57d
  20. 12 4月, 2016 1 次提交
  21. 28 10月, 2015 1 次提交
  22. 21 10月, 2015 1 次提交
    • C
      powerpc/prom: Avoid reference to potentially freed memory · 1856f50c
      Christophe Jaillet 提交于
      of_get_property() is used inside the loop, but then the reference to the
      node is dropped before dereferencing the prop pointer, which could by then
      point to junk if the node has been freed.
      
      Instead use of_property_read_u32() to actually read the property
      value before dropping the reference.
      
      of_property_read_u32() requires at least one cell (u32) to be present,
      which is stricter than the old logic which would happily dereference a
      property of any size. However we believe all device trees in the wild
      have at least one cell.
      
      Skiboot may produce memory nodes with more than one cell, but that is
      OK, of_property_read_u32() will return the first one.
      Signed-off-by: NChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      [mpe: Expand change log with device tree details]
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      1856f50c
  23. 12 8月, 2015 2 次提交
  24. 08 6月, 2015 1 次提交
  25. 02 6月, 2015 1 次提交
  26. 11 5月, 2015 1 次提交
  27. 07 3月, 2015 1 次提交
  28. 02 2月, 2015 1 次提交
  29. 14 11月, 2014 1 次提交
  30. 10 11月, 2014 1 次提交
  31. 02 10月, 2014 1 次提交
  32. 25 9月, 2014 2 次提交