Currently, the nominal voltage is updated in the VC post-scale function
which is common to both scaling methods.  However, this has readabiliy
problems as this update is not where it might be expected.  Instead, move
the updated into voltdm_scale() upon a successful return of voltdm->scale()
Signed-off-by: NKevin Hilman <khilman@ti.com>

Track current nominal voltage as part of struct voltagedomain instead
of omap_vdd_info, which will soon be removed.

Also renames field from curr_volt to nominal_volt.

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Create new helper function in VP layer for updating VP error gain.
Currently used during pre-scale for VP force update and VC bypass.

TODO: determine if this can be removed from the pre-scale path and
moved to VP enable path.
Signed-off-by: NKevin Hilman <khilman@ti.com>

In struct omap_vp_common, the shift value can be derived from the mask
value by using __ffs(), so remove the shift value for the various
VPCONFIG bitfields, and use __ffs() in the code for the shift value.

While here, rename field names in kerneldoc comment to match actual
field names in structure.  Also, cleanup indendentaion for other VP
register accesses in omap_vp_init().

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

- move VP instance struct from vdd_info into struct voltage domain
- remove _data suffix from structure name
- rename vp_ prefix from vp_common field: accesses are now vp->common
- move vp_enabled bool from vdd_info into VP instance
- remove remaining references to omap_vdd_info

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Instead of reading current vsel value from the VP's voltage register,
just use current nominal voltage translated into vsel via the PMIC.

Doing this allows VC bypass scaling to work even without a VP configured.
Signed-off-by: NKevin Hilman <khilman@ti.com>

On OMAP3+, all VC channels have the the same bitfield ordering for all
VC channels, except the OMAP4 MPU channel.  This appears to be a freak
accident as all other VC channel (including OMAP5) have the standard
configuration.  Handle the mutant case by adding a per-channel flag
to signal the deformity and handle it during VC init.

Special thanks to Nishanth Menon <nm@ti.com> for finding this problem
and for proposing the initial solution.

Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove hard-coded I2C configuration in favor of settings that can be
configured from PMIC-specific values.  Currently only high-speed mode
and the master-code value are supported, since they were the only
fields currently used, but extending this is now trivial.

Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse
problem and making omap_vc_i2c_init() static, as well as finding and
fixing a problem with the shift/mask of mcode.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Move structure containing PMIC configurable settings into struct
voltagedomain.  In the process, rename from omap_volt_pmic_info to
omap_voltdm_pmic (_info suffix is not helpful.)

No functional changes.
Signed-off-by: NKevin Hilman <khilman@ti.com>

VC channel configuration is programmed based on settings coming from
the PMIC configuration.

Currently, the VC channel to PMIC mapping is a simple one-to-one
mapping.  Whenever a VC channel parameter is configured (i2c slave
addres, PMIC register address, on/ret/off command), the corresponding
bits are enabled in the VC channel configuration register.

If necessary, the programmability of channel configuration settings
could be extended to board/PMIC files, however, because this patch
changes the channel configuration to be programmed based on existing
values from the PMIC settings, it may not be required.

Also note that starting with OMAP4, where there are more than 2
channels, one channel is identified as the "default" channel.  When
any of the bits in the channel config for the other channels are zero,
it means to use the default channel.  The OMAP4 TRM (at least through
NDA version Q) is wrong in describing which is the default channel.
The default channel on OMAP4 is MPU, not CORE as decribed in the TRM.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Configuring the on/onlp/ret/off command values is common to OMAP3 & 4.
Move from OMAP3-only init into common VC init.
Signed-off-by: NKevin Hilman <khilman@ti.com>

- add setup_time field to struct omap_vc_channel (init'd from PMIC data)
- use VC/VP register access helper for read/modify/write
- move VFSM structure from omap_vdd_info into struct voltagedomain
- remove redunant _data suffix from VFSM structures and variables
- remove voltsetup_shift, use ffs() on the mask value to find the shift
Signed-off-by: NKevin Hilman <khilman@ti.com>

The PMIC configurable variables should be isolated to VC initialization.
The rest of the VC functions (like VC bypass) should use the i2c slave address
and voltage register address fields from struct omap_vc_channel.
Signed-off-by: NKevin Hilman <khilman@ti.com>

- support both voltage register address and command register address
  for each VC channel
- add fields for voltage register address (volra) and command register
  address (cmdra) to struct omap_vc_channel
- use VC/VP register access read/modify/write helper
- remove volra_shift field (use __ffs(mask) for shift value)
- I2C addresses 10-bit, change size to u16
Signed-off-by: NKevin Hilman <khilman@ti.com>

- Add an i2c_slave_address field to the omap_vc_channel
- use VC/VP read/modify/write helper instead of open-coding
- remove smps_sa_shift, use __ffs(mask) for shift value
- I2C addresses 10-bit, change size to u16

Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting
the use of __ffs(x) instead of ffs(x) - 1.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Convert VC/VP register access to use PRM VC/VP accessor functions.  In
the process, move the read/write function pointers from vdd_info into
struct voltagedomain.

No functional changes.

Additional cleanup:
- remove prm_mod field from  VC/VP data structures, the PRM register
  access functions know which PRM module to use.
Signed-off-by: NKevin Hilman <khilman@ti.com>

The VC layer can support PMICs with separate voltage and command
registers by putting the different registers in the PRM_VC_SMPS_VOL_RA
and PRCM_VC_SMPS_CMD_RA registers respectively.

The PMIC data must supply at least a voltage register address
(volt_reg_addr).  The command register address (cmd_reg_addr) is
optional.  If the PMIC data does not supply a separate command
register address, the VC will use the voltage register address for both.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Move the VC instance struct from omap_vdd_info into struct voltagedomain.
While moving, perform some misc. renames for readability.

No functional changes.

Summary of renames:
- rename omap_vc_instance to omap_vc_channel, since there is only
  one instance of the VC IP and this actually represents channels
  using TRM terminology.
- rename 'vc_common' field of VC channel which led to:
  s/vc->vc_common/vc->common/
- remove redundant '_data' suffix
- OMAP3: vc1 --> vc_mpu, vc2 --> vc_core
- omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale()
Signed-off-by: NKevin Hilman <khilman@ti.com>

merge

As part of the voltage layer cleanup, split out VC specific code into
a dedicated VC layer.  This patch primarily just moves VC code from
voltage.c into vc.c, and adds prototypes to vc.h.

No functional changes.

For readability, each function was given a local 'vc' pointer:

    struct omap_vc_instance_data *vc = voltdm->vdd->vc_data;

and a global replace of s/vdd->vc_data/vc/ was done.

Also vc_init was renamed to vc_init_channel to reflect that this is
per-VC channel initializtion.
Signed-off-by: NKevin Hilman <khilman@ti.com>