1. 21 1月, 2011 1 次提交
    • D
      kconfig: rename CONFIG_EMBEDDED to CONFIG_EXPERT · 6a108a14
      David Rientjes 提交于
      The meaning of CONFIG_EMBEDDED has long since been obsoleted; the option
      is used to configure any non-standard kernel with a much larger scope than
      only small devices.
      
      This patch renames the option to CONFIG_EXPERT in init/Kconfig and fixes
      references to the option throughout the kernel.  A new CONFIG_EMBEDDED
      option is added that automatically selects CONFIG_EXPERT when enabled and
      can be used in the future to isolate options that should only be
      considered for embedded systems (RISC architectures, SLOB, etc).
      
      Calling the option "EXPERT" more accurately represents its intention: only
      expert users who understand the impact of the configuration changes they
      are making should enable it.
      Reviewed-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NDavid Woodhouse <david.woodhouse@intel.com>
      Signed-off-by: NDavid Rientjes <rientjes@google.com>
      Cc: Greg KH <gregkh@suse.de>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Jens Axboe <axboe@kernel.dk>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Robin Holt <holt@sgi.com>
      Cc: <linux-arch@vger.kernel.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      6a108a14
  2. 13 12月, 2010 1 次提交
  3. 01 12月, 2010 1 次提交
  4. 26 11月, 2010 1 次提交
  5. 09 11月, 2010 2 次提交
  6. 04 11月, 2010 1 次提交
    • P
      sh: nommu: use 32-bit phys mode. · e2fcf74f
      Paul Mundt 提交于
      The nommu code has regressed somewhat in that 29BIT gets set for the
      SH-2/2A configs regardless of the fact that they are really 32BIT sans
      MMU or PMB. This does a bit of tidying to get nommu properly selecting
      32BIT as it was before.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      e2fcf74f
  7. 01 11月, 2010 1 次提交
    • P
      sh: machvec IO death. · 37b7a978
      Paul Mundt 提交于
      This takes a bit of a sledgehammer to the machvec I/O routines. The
      iomem case requires no special casing and so can just be dropped
      outright. This only leaves the ioport casing for PCI and SuperIO
      mangling. With the SuperIO case going through the standard ioport
      mapping, it's possible to replace everything with generic routines.
      
      With this done the standard I/O routines are tidied up and NO_IOPORT
      now gets default-enabled for the vast majority of boards.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      37b7a978
  8. 27 10月, 2010 1 次提交
  9. 26 10月, 2010 1 次提交
  10. 19 10月, 2010 1 次提交
    • P
      irq_work: Add generic hardirq context callbacks · e360adbe
      Peter Zijlstra 提交于
      Provide a mechanism that allows running code in IRQ context. It is
      most useful for NMI code that needs to interact with the rest of the
      system -- like wakeup a task to drain buffers.
      
      Perf currently has such a mechanism, so extract that and provide it as
      a generic feature, independent of perf so that others may also
      benefit.
      
      The IRQ context callback is generated through self-IPIs where
      possible, or on architectures like powerpc the decrementer (the
      built-in timer facility) is set to generate an interrupt immediately.
      
      Architectures that don't have anything like this get to do with a
      callback from the timer tick. These architectures can call
      irq_work_run() at the tail of any IRQ handlers that might enqueue such
      work (like the perf IRQ handler) to avoid undue latencies in
      processing the work.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Acked-by: NKyle McMartin <kyle@mcmartin.ca>
      Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      [ various fixes ]
      Signed-off-by: NHuang Ying <ying.huang@intel.com>
      LKML-Reference: <1287036094.7768.291.camel@yhuang-dev>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e360adbe
  11. 11 10月, 2010 1 次提交
  12. 02 10月, 2010 1 次提交
  13. 01 10月, 2010 1 次提交
  14. 20 9月, 2010 1 次提交
  15. 16 8月, 2010 1 次提交
    • S
      sh: fix recursive dependency in Kconfig · e583d6b3
      Sam Ravnborg 提交于
      When executing:
      
         make ARCH=sh defconfig
      
      kconfig segfaulted.
      kconfig should obviously not segfault.
      
      But this indicated a problem in the sh files which was
      tracked down to a recursive dependency.
      
      We select HAVE_HW_BREAKPOINT and in the following line
      we use the same symbol in an expression.
      Drop the conditional as it is of no use.
      Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
      Cc: Michal Marek <mmarek@suse.cz>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      e583d6b3
  16. 27 7月, 2010 1 次提交
  17. 14 7月, 2010 1 次提交
  18. 06 7月, 2010 1 次提交
  19. 14 6月, 2010 1 次提交
  20. 02 6月, 2010 1 次提交
    • P
      sh: support for platforms without PIO. · 86e4dd5a
      Paul Mundt 提交于
      This extends some of the existing special casing for HAS_IOPORT
      platforms and gets it to the point where platforms can begin to
      conditionally select it.
      
      The major changes here are that the PIO routines themselves go away
      completely, including all of the machvec port mapping wrappers. With this
      in place it's possible for any non-machvec abusing platform to disable
      PIO completely. At present this is left as an opt-in until the abusers
      are the odd ones out instead of the majority.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      86e4dd5a
  21. 31 5月, 2010 1 次提交
  22. 28 5月, 2010 1 次提交
  23. 11 5月, 2010 1 次提交
  24. 07 5月, 2010 1 次提交
  25. 01 5月, 2010 1 次提交
    • F
      hw-breakpoints: Separate constraint space for data and instruction breakpoints · 0102752e
      Frederic Weisbecker 提交于
      There are two outstanding fashions for archs to implement hardware
      breakpoints.
      
      The first is to separate breakpoint address pattern definition
      space between data and instruction breakpoints. We then have
      typically distinct instruction address breakpoint registers
      and data address breakpoint registers, delivered with
      separate control registers for data and instruction breakpoints
      as well. This is the case of PowerPc and ARM for example.
      
      The second consists in having merged breakpoint address space
      definition between data and instruction breakpoint. Address
      registers can host either instruction or data address and
      the access mode for the breakpoint is defined in a control
      register. This is the case of x86 and Super H.
      
      This patch adds a new CONFIG_HAVE_MIXED_BREAKPOINTS_REGS config
      that archs can select if they belong to the second case. Those
      will have their slot allocation merged for instructions and
      data breakpoints.
      
      The others will have a separate slot tracking between data and
      instruction breakpoints.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Acked-by: NPaul Mundt <lethal@linux-sh.org>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Cc: K. Prasad <prasad@linux.vnet.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@elte.hu>
      0102752e
  26. 29 4月, 2010 1 次提交
  27. 27 4月, 2010 1 次提交
  28. 26 4月, 2010 1 次提交
  29. 13 4月, 2010 1 次提交
    • P
      sh: intc: userimask support. · 43b8774d
      Paul Mundt 提交于
      This adds support for hardware-assisted userspace irq masking for
      special priority levels. Due to the SR.IMASK interactivity, only some
      platforms implement this in hardware (including but not limited to
      SH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU
      needs to wire this up on its own, for now only SH7786 is wired up as an
      example.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      43b8774d
  30. 13 3月, 2010 1 次提交
  31. 02 2月, 2010 5 次提交
  32. 29 1月, 2010 1 次提交
  33. 19 1月, 2010 2 次提交
    • P
      sh: SH7786 clock framework rewrite. · 43a1839c
      Paul Mundt 提交于
      This rewrites the SH7786 clock framework support completely. It's
      reworked to provide all of the DIV4 and MSTP function clocks. This brings
      it in line with the current clock framework code and lets us drop SH7786
      from the list of CPUs that require legacy CPG handling.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      43a1839c
    • P
      sh: Limit ioremap_prot() to 32bit pgprot parts. · 6d63e73d
      Paul Mundt 提交于
      Presently ioremap_prot() uses an unsigned long to pass the pgprot value
      around. This results in the upper half of the pgprot being chomped when
      using 64-bit pgprots on a 32-bit ABI (X2TLB and SH-5).
      
      As the only users of ioremap_prot() are presently legacy parts, this
      doesn't cause too much of an issue. In the future when the interface is
      converted to use pgprot_t directly this can be re-enabled for the other
      parts, too.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      6d63e73d
  34. 13 1月, 2010 1 次提交