1. 13 2月, 2016 1 次提交
    • S
      Revert "clk: qcom: Specify LE device endianness" · c430daf9
      Stephen Boyd 提交于
      This reverts commit 329cabce.
      
      The commit that caused us to specify LE device endianness here,
      29bb45f2 (regmap-mmio: Use native endianness for read/write,
      2015-10-29), has been reverted in mainline so now when we specify
      LE it actively breaks big endian kernels because the byte
      swapping in regmap-mmio is incorrect. Let's revert this change
      because it will 1) fix the big endian kernels and 2) be redundant
      to specify LE because that will become the default soon.
      
      Cc: Kevin Hilman <khilman@linaro.org>
      Tested-by: NKevin Hilman <khilman@baylibre.com>
      Cc: Mark Brown <broonie@kernel.org>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      c430daf9
  2. 21 11月, 2015 1 次提交
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      clk: qcom: Specify LE device endianness · 329cabce
      Stephen Boyd 提交于
      All these clock controllers are little endian devices, but so far
      we've been relying on the regmap mmio bus handling this for us
      without explicitly stating that fact. After commit 4a98da2164cf
      (regmap-mmio: Use native endianness for read/write, 2015-10-29),
      the regmap mmio bus will read/write with the __raw_*() IO
      accessors, instead of using the readl/writel() APIs that do
      proper byte swapping for little endian devices.
      
      So if we're running on a big endian processor and haven't
      specified the endianness explicitly in the regmap config or in
      DT, we're going to switch from doing little endian byte swapping
      to big endian accesses without byte swapping, leading to some
      confusing results. On my apq8074 dragonboard, this causes the
      device to fail to boot as we access the clock controller with
      big endian IO accesses even though the device is little endian.
      
      Specify the endianness explicitly so that the regmap core
      properly byte swaps the accesses for us.
      Reported-by: NKevin Hilman <khilman@linaro.org>
      Tested-by: NTyler Baker <tyler.baker@linaro.org>
      Tested-by: NKevin Hilman <khilman@linaro.org>
      Cc: Simon Arlott <simon@fire.lp0.eu>
      Cc: Mark Brown <broonie@kernel.org>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      329cabce
  3. 17 11月, 2015 1 次提交
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      clk: qcom: Move cxo/pxo/xo into dt files · a085f877
      Stephen Boyd 提交于
      Put these clocks into the dt files instead of registering them
      from C code. This provides a few benefits. It allows us to
      specify the frequency of these clocks at the board level instead
      of hard-coding them in the driver. It allows us to insert an RPM
      clock in between the consumers of the crystals and the actual
      clock. And finally, it helps us transition the GCC driver to use
      RPM clocks when that configuration is enabled.
      
      Cc: Georgi Djakov <georgi.djakov@linaro.org>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      a085f877
  4. 09 10月, 2015 1 次提交
  5. 07 7月, 2015 1 次提交
  6. 24 3月, 2015 1 次提交
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      clk: qcom: Introduce parent_map tables · 293d2e97
      Georgi Djakov 提交于
      In the current parent mapping code, we can get duplicate or inconsistent
      indexes, which leads to discrepancy between the number of elements in the
      array and the number of parents. Until now, this was solved with some
      reordering but this is not always possible.
      
      This patch introduces index tables that are used to define the relations
      between the PLL source and the hardware mux configuration value.
      To accomplish this, here we do the following:
       - Define a parent_map struct to map the relations between PLL source index
       and register configuration value.
       - Add a qcom_find_src_index() function for finding the index of a clock
       matching the specific PLL configuration.
       - Update the {set,get}_parent RCG functions use the newly introduced
       parent_map struct.
       - Convert all existing drivers to the new parent_map tables.
      Signed-off-by: NGeorgi Djakov <georgi.djakov@linaro.org>
      Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
      293d2e97
  7. 20 10月, 2014 1 次提交
  8. 17 5月, 2014 1 次提交
  9. 01 5月, 2014 1 次提交
  10. 17 1月, 2014 2 次提交