1. 06 7月, 2014 1 次提交
  2. 29 5月, 2014 5 次提交
    • H
      mtd: gpmi: add gpmi support for imx6sx · 91f5498e
      Huang Shijie 提交于
      The gpmi's IP for imx6sx is nearly the same as the gpmi's IP for imx6q,
      except the following two new features:
      
           (1) the new BCH contoller has 62-BIT correcting ECC strength
                  (The BCH for imx6q only has 40-BIT ECC strength).
      
           (2) add the hardware Randomizer support.
      
      This patch does the follow changes:
      
           (1) add a new macro GPMI_IS_MX6SX to represent the imx6sx's gpmi.
      
           (2) add a new macro GPMI_IS_MX6.
                 We use this macro to initialize the same registers for both
               imx6sx and imx6q, and so on.
      
           (3) add a new gpmi_devdata instance, the gpmi_devdata_imx6sx, for
               imx6sx.
      Signed-off-by: NHuang Shijie <b32955@freescale.com>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      91f5498e
    • P
      mtd: maps: remove check for CONFIG_MTD_SUPERH_RESERVE · 390e9eac
      Paul Bolle 提交于
      Since (a few releases before) v2.6.0 there have been checks for
      CONFIG_MTD_SUPERH_RESERVE. One check is still present. But a Kconfig
      symbol MTD_SUPERH_RESERVE has never been added. So a few lines of dead
      code can be removed.
      Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      390e9eac
    • H
      mtd: bf5xx_nand: use the managed version of kzalloc · 0c53be9d
      Himangi Saraogi 提交于
      This patch moves data allocated using kzalloc to managed data allocated
      using devm_kzalloc and cleans now unnecessary kfrees in probe and remove
      functions. Also, the now unnecessary label out_err_hw_init is done away
      with and the label out_err_kzalloc is renamed to out_err.
      
      The following Coccinelle semantic patch was used for making the change:
      
      @platform@
      identifier p, probefn, removefn;
      @@
      struct platform_driver p = {
        .probe = probefn,
        .remove = removefn,
      };
      
      @prb@
      identifier platform.probefn, pdev;
      expression e, e1, e2;
      @@
      probefn(struct platform_device *pdev, ...) {
        <+...
      - e = kzalloc(e1, e2)
      + e = devm_kzalloc(&pdev->dev, e1, e2)
        ...
      ?-kfree(e);
        ...+>
      }
      
      @rem depends on prb@
      identifier platform.removefn;
      expression e;
      @@
      removefn(...) {
        <...
      - kfree(e);
        ...>
      }
      Signed-off-by: NHimangi Saraogi <himangi774@gmail.com>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      0c53be9d
    • T
      mtd: pxa3xx_nand: make the driver work on big-endian systems · b7e46062
      Thomas Petazzoni 提交于
      The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
      to access I/O registers. However, those functions do not do any
      endianness swapping, which means that they won't work when the CPU
      runs in big-endian but the I/O registers are little endian, which is
      the common situation for ARM systems running big endian.
      
      Since __raw_writel() and __raw_readl() do not include any memory
      barriers and the pxa3xx_nand driver can only be compiled for ARM
      platforms, the closest I/o accessors functions that do endianess
      swapping are writel_relaxed() and readl_relaxed().
      
      This patch has been verified to work on Armada XP GP: without the
      patch, the NAND is not detected when the kernel runs big endian while
      it is properly detected when the kernel runs little endian. With the
      patch applied, the NAND is properly detected in both situations
      (little and big endian).
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: <stable@vger.kernel.org> # v3.13+
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      b7e46062
    • T
      mtd: nand: omap: fix omap_calculate_ecc_bch() for-loop error · 2913aae5
      Ted Juan 提交于
       Fixes:  2c9f2365
       mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch4 in omap_calculate_ecc_bch
      
       Fixes: 7bcd1dca
       mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch8 in omap_calculate_ecc_bch
      
      Cc: <stable@vger.kernel.org> # 3.13.x+
      Signed-off-by: NTed Juan <ted.juan@gmail.com>
      Acked-by: NPekon Gupta <pekon@ti.com>
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      2913aae5
  3. 28 5月, 2014 5 次提交
  4. 27 5月, 2014 2 次提交
  5. 22 5月, 2014 3 次提交
  6. 21 5月, 2014 16 次提交
  7. 14 5月, 2014 1 次提交
  8. 13 5月, 2014 6 次提交
  9. 10 5月, 2014 1 次提交
    • B
      mtd: nand: refactor erase_cmd() to return chip status · 49c50b97
      Brian Norris 提交于
      The nand_chip::erase_cmd callback previously served a dual purpose; for
      one, it allowed a per-flash-chip override, so that AG-AND devices could
      use a different erase command than other NAND. These AND devices were
      dropped in commit 14c65786 (mtd: nand:
      remove AG-AND support). On the other hand, some drivers (denali and
      doc-g4) need to use this sort of callback to implement
      controller-specific erase operations.
      
      To make the latter operation easier for some drivers (e.g., ST's new BCH
      NAND driver), it helps if the command dispatch and wait functions can be
      lumped together, rather than called separately.
      
      This patch does two things:
       1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return
          the status from this callback
       2. Rename erase_cmd() to just erase(), since this callback does a
          little more than just send a command
      Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
      Tested-by: NLee Jones <lee.jones@linaro.org>
      49c50b97