The negotiated ocr mask is directly related to the card. Once a card
gets removed, the mask shall be dropped. By moving the cache of the ocr
mask from the host struct to the card struct we have accomplished this.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

At several places in mmc_sdio_init_card function the cached mask in
host->ocr were being updated. To simplify code, we make use of an
local ocr parameter instead.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The retry and fallback mechanism when failing to switch to 1.8V
signaling voltage is handled by the SDIO card init function. Thus we
can remove the duplicated old code from the attach function.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This is yet another step of restructure code to be able to fixup the
setup of the negotiated ocr mask.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

As a step to fixup the setup of the negotiated ocr mask, we need the
mmc_power_up|cycle functions to take the ocr as a parameter.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some switch operations like poweroff notify, shall according to the
spec not be followed by any other new commands. For these cases and
when the host does'nt support MMC_CAP_WAIT_WHILE_BUSY, we must not
send status commands to poll for busy detection. Instead wait for
the stated timeout from the EXT_CSD before completing the request.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch adds intel_mid clovertrail SDIO and eMMC device
IDs to the sdhci-pci driver.
Signed-off-by: NEric Ernst <eric.ernst@linux.intel.com>
Signed-off-by: NDavid Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

With lazy disable gone, no_off is not used any more in omap_hsmmc
Signed-off-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

clock divisor can take a max value of 1023.  Update code so that card
init can be handled at f_min even at higher IP clock frequencies from
which clock to the card is derived.
Signed-off-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

With HSMMC_HAS_UPDATED_RESET reset of cmd/data (SRC/SRD) can be to
quick and can be missed resulting in wait for software timeout.
With cpu_relax timeout can be long and unpredictable. Use udelay
instead for timeout implementation.
Reported-by: NYuzheng Ma <mayuzheng@kedacom.com>
Tested-by: NYuzheng Ma <mayuzheng@kedacom.com>
Reviewed-by: NHein Tibosch <hein_tibosch@yahoo.es>
Signed-off-by: NJianpeng Ma <majianpeng@gmail.com>
Signed-off-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

We want to get rid of the omap specific platform init code
callbacks as they don't play nice with device tree.

Convert the context loss check to be based on a
register state detection instead.

Cc: Andreas Fenkart <afenkart@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
[add check for CON and HCTL in context save and restore function]
Signed-off-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

pbias_disable is set to protect the mmc pbias i/o cells in DT boot
by preventing voltage switch. Currently pbias_disable is enabled only
for omap3 and not for omap4 due to reg_offset difference of 0x100.
Enable pbias_disable for omap4+ too by using res->start
which does not include the reg_offset.
Signed-off-by: NBalaji T K <balajitk@ti.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Remove unneeded call of call sdhci_enable_preset_value when having
SDHCI_QUIRK2_PRESET_VALUE_BROKEN.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The i.MX6 does not support preset value feature.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The imx6q/dl supports SDR50 tunning, enable it for a better timing
on SDR50 mode.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock period) regardless of on-chip variations
such as process, voltage and temperature (PVT).

This patch adds a user interface to set slave delay line via device tree.
It's usually used in high speed mode like mmc DDR mode when the signal
quality is not good caused by board design, e.g. the signal path is too
long.  User can manually set delay line to find a suitable data sampling
window for card to work properly.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

When DDR mode is enabled, the initial pre_div should be 2.
And the pre_div value should be changed accordingly
from
...
02h) Base clock divided by 4
01h) Base clock divided by 2
00h) Base clock divided by 1
to
..
02h) Base clock divided by 8
01h) Base clock divided by 4
00h) Base clock divided by 2
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The original code missed to report an error when the maximum tuning
loops exhausted or timeout, it will cause the upper layer to wrongly
think the tuning process is passed.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.

Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The mx6sl supports standard sdhci tuning, then esdhc_executing_tuning
is only needed for mx6q/dl. We introduce is_imx6_usdhc() and
is_imx6sl_usdhc() to handle the difference.

The standard tuning is enabled by setting ESDHC_TUNE_CTRL_STD_TUNING_EN bit
in new register ESDHC_TUNE_CTRL and operates with new tuning bits
defined in SDHCI_ACMD12_ERR register.

Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if
not enable standard tuning mode.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Create a struct esdhc_soc_data with moving 'flags' field from
pltfm_imx_data into it, and pass the pointer of this SoC specific data
structure through of_device_id.data directly, so that the translation
from enum imx_esdhc_type to flags can be saved.

With the change, enum imx_esdhc_type can be eliminated, since we can
implement the is_imx*_esdhc() by checking the esdhc_soc_data pointer.
The unused is_imx35_esdhc() and is_imx51_esdhc() are also removed, and the
others are kept there as we will need to use them to handle some small
register differences later, where use of new flags might be a little
overkilled.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <b29396@freescale.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

As a good practice, device driver should not modify pdev->id_entry but
keep it immutable.  Let's assign of_device_id.data with imx_esdhc_type
constants directly, so that we do not have to manipulate pdev->id_entry
in .probe().

As the result, sdhci-esdhc-imx53 and sdhci-usdhc-imx6q can be removed
from platform_device_id table now, since they will only probe from
device tree.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <b29396@freescale.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Add flag ESDHC_FLAG_USDHC to tell that the ESDHC is actually an USDHC
block, and replace the is_imx6q_usdhc() occurrences with inline function
esdhc_is_usdhc() which checks the flag.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <b29396@freescale.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Just like the use of the flag ESDHC_FLAG_MULTIBLK_NO_INT, let's add
another flag ESDHC_FLAG_ENGCM07207 to enable the workaround for errata
ENGcm07207 and set the flag for i.MX25 and i.MX35 ESDHC.

While at it, let's use BIT() macro for ESDHC_FLAG_MULTIBLK_NO_INT as
well.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <b29396@freescale.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The DMA operation in SDIO CMD53 may fail because the 4 bit SDIO mode
is not set up correctly on BF548.
Remove 2 blank lines as well.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Simplify the code to set/clear BM_SD_OFF bit:

          | power_inverted: 0  | power_inverted: 1
-------------------------------------------------
enable: 0 | SET BM_SD_OFF      | CLEAR BM_SD_OFF
-------------------------------------------------
enable: 1 | CLEAR BM_SD_OFF    | SET BM_SD_OFF
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NTony Prisk <linux@prisktech.co.nz>
Signed-off-by: NChris Ball <cjb@laptop.org>

Implement initial SDHCI Intel Merrifield support.  This patch is based
on previous one from Yunpeng Gao <yunpeng.gao@intel.com>.
Signed-off-by: NDavid Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This enables access the actual_clock via sys.
root@imx6qsabreauto:~# cat /sys/kernel/debug/mmc0/ios
clock:          198000000 Hz
actual clock:   198000000 Hz
vdd:            17 (2.9 ~ 3.0 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    6 (sd uhs SDR104)
signal voltage: 0 (1.80 V)
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

According to spec, the pre_div for imx6q should be 1, or the biggest
clock rate we can get is a half of host clock rate.  This may cause
we can not get the proper clock rate as we want.  e.g. if the desired
clock is 200Mhz, however, the host clock is 200Mhz too, then it causes
the actual clock we get is 100Mhz due to pre_div is 2.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Without proper pinctrl state, the card may not be able to work
on high speed stablely. e.g. SDR104.

This patch add pinctrl state switch code according to different
uhs mode include 100mhz sate, 200mhz sate and normal state
(50Mhz and below).
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

Freescale i.MX6Q/DL uSDHC clock tuning progress is a little different from
the standard tuning process defined in host controller spec v3.0.
Thus we use platform_execute_tuning instead of standard sdhci tuning.

The main difference are:
1) not only generate Buffer Read Ready interrupt when tuning is performing.
   It generates all other DATA interrupts like the normal data command.
2) SDHCI_CTRL_EXEC_TUNING is not automatically cleared by HW,
   instead it's controlled by SW.
3) SDHCI_CTRL_TUNED_CLK is not automatically set by HW,
   it's controlled by SW.
4) the clock delay for every tuning is set by SW.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The signal voltage switch flow requires to shutdown and output
clock in a specific sequence according to standard host controller
v3.0 spec. In that timing, the card must really receive clock or not.

However, for i.MX6Q, the uSDHC will not output clock even the clock
is enabled until there is command or data in transfer on the bus,
which will then cause singal voltage switch always to fail.

For i.MX6Q, we clear ESDHC_VENDOR_SPEC_FRC_SDCLK_ON bit to let
controller to gate off clock automatically and set that bit
to force clock output if clock is on.

This is required by SD3.0 support.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

We need a lot of imx6 specific things into common esdhc_set_clock
for support SD3.0 and eMMC DDR mode which is not needed for power pc
platforms, so esdhc_set_clock seems not so common anymore.

Instead of keeping add platform specfics things into this common API,
we choose to move that code into platform driver itself to handle.
This can also exclude the dependency between imx and power pc on this
headfile and is easy for maintain in the future.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

It helps for platform code to use it send tuning commands.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The tuning of some platforms may not follow the standard host control
spec v3.0, e.g. Freescale uSDHC on i.MX6Q/DL.
Add a hook here to allow execute platform specific tuning instead of
standard host controller tuning.

The hook only replaces the tuning process, so it's placed after tuning
checking and before the real tuning process.

Some notes for the tuning hook:
1) it needs handle lock itself if it wants to access host controller
according platform specific implementation.
2) do not need to handle runtime pm since it executes with runtime pm
get already.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This avoid duplicated implementation.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

This avoid duplicated implementation and also fixes missing iounmap() and
release_mem_region() calls in sdhci_bcm_kona_remove().  sdhci_pltfm_init()
calls request_mem_region() and ioremap(), thus we need to call the
corresponding iounmap() and release_mem_region() calls in
sdhci_bcm_kona_remove().
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

'dw_mci_socfpga_probe' is used only in this file. Make it static.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

'dw_mci_socfpga_match' is always compiled in.
Hence of_match_ptr is not necessary.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

devm_request_and_ioremap() is deprecated. Use devm_ioremap_resource()
instead.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>