- 22 8月, 2014 3 次提交
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由 Kumar Gala 提交于
Add basic IPQ8064 SoC include device tree and support for basic booting on the AP148 Reference board with support for UART, I2C, and SPI. Signed-off-by: NKumar Gala <galak@codeaurora.org>
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由 Georgi Djakov 提交于
Add the necessary DT node to probe the serial driver on APQ8084 platforms. Signed-off-by: NGeorgi Djakov <gdjakov@mm-sol.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Georgi Djakov 提交于
This patch adds the necessary node to probe the global clock controller on APQ8084 platforms. Signed-off-by: NGeorgi Djakov <gdjakov@mm-sol.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
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- 09 8月, 2014 2 次提交
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由 Stephen Rothwell 提交于
This was caused by commit 5a8da524 ("ARM: dts: exynos5420: add dsi node"), which conflicted with d51cad7d ("ARM: dts: remove display power domain for exynos5420"). The DTS addition should never have been merged through the DRM tree in the first place, and it lacked an ack from the platform maintainer (who would have known that the disp_pd reference got removed). Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Doug Anderson 提交于
The EHCI and HSIC device tree nodes were added in the wrong place. Fix them. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 03 8月, 2014 4 次提交
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由 YoungJun Cho 提交于
This patch adds common part of dsi node. Signed-off-by: NYoungJun Cho <yj44.cho@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 YoungJun Cho 提交于
This patch adds mipi-phy node for MIPI DSI device. Signed-off-by: NYoungJun Cho <yj44.cho@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 YoungJun Cho 提交于
This patch adds sysreg property to fimd device node which is required to use I80 interface. Signed-off-by: NYoungJun Cho <yj44.cho@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 YoungJun Cho 提交于
This patch adds sysreg property to fimd device node which is required to use I80 interface. Signed-off-by: NYoungJun Cho <yj44.cho@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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- 01 8月, 2014 1 次提交
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由 Vince Bridgers 提交于
This patch adds socfpga Ethernet filter attributes for multicast and unicast filters per Synopsys Ethernet IP configuration chosen by Altera for the Cyclone 5 and Arria SOC FPGAs. Signed-off-by: NVince Bridgers <vbridgers2013@gmail.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 7月, 2014 8 次提交
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由 Haojian Zhuang 提交于
Use CPU_METHOD_OF_DECLARE() instead. And declare smp method in dts file. Changelog: v6: * Use hisilicon,hi3620-smp as enable-method property in Hi3620 dts. Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org> Acked-by: NWei Xu <xuwei5@hisilicon.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Haifeng Yan 提交于
Add dts file for Hisilicon x5hd2 development kit board. Signed-off-by: NHaifeng Yan <yanhaifeng@gmail.com> Signed-off-by: NJiancheng Xue <jchxue@gmail.com> Signed-off-by: NHaojian Zhuang <haojian.zhuang@linaro.org> Acked-by: NWei Xu <xuwei5@hisilicon.com> [olof: Rename dts/dtsi to include hisi prefix] Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Doug Anderson 提交于
This is the top USB port on the evb (the one closest to the Ethernet connector). Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Kever Yang 提交于
rk3288 has two kind of usb controller; this adds the ehci variant for host0 and hsic. At the moment we don't add any phys for these controllers, but the default settings seem to work OK. There is a hardware problem in ohci controller which make it unavailable and host0 controller can only support high-speed devices. Signed-off-by: NKever Yang <kever.yang@rock-chips.com> Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Doug Anderson 提交于
There is no phy driver that works on the Rockchip board for either USB host port yet. For now just hardcode the vbus signal to be on all the time which makes both the dwc2 host and the EHCI port work. Signed-off-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Marcel Ziswiler 提交于
Working on sound support I noticed the Apalis T30 Evaluation board device tree missing the more generic Apalis T30 compatible string. Signed-off-by: NMarcel Ziswiler <marcel@ziswiler.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Thierry Reding 提交于
Indentation of the clock property used a hodgepodge of tabs and spaces. Make them more consistent (tabs for indentation followed by spaces for alignment). Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Linus Walleij 提交于
The GPIO pin connected to card detect was inverted twice: once by the argument to the GPIO line itself where it was magically marked as active low by the flag GPIO_ACTIVE_LOW (0x01) in the third cell, and also marked active low AGAIN by explicitly stating "cd-inverted" (a deprecated method). After commit 78f87df2 "mmc: mmci: Use the common mmc DT parser" this results in the line being inverted twice so it was effectively uninverted, while the old code would not have this effect, instead disregarding the flag on the GPIO line altogether, which is a bug. I admit the semantics may be unclear but inverting twice is as good a definition as any on how this should work. So fix up the buggy device tree. Use proper #includes so the DTS is clear and readable. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 30 7月, 2014 8 次提交
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由 Heiko Stuebner 提交于
This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Heiko Stuebner 提交于
We set default pinctrl settings for the uarts in rk3188.dtsi already, so remove forgotten duplicate. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Chanwoo Choi 提交于
This patch add missing pinctrl for uart0/1 for Exynos3250. The gpio pin ( uart0_data, uart0_fctl, uart1_data) is only used for UART IP. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanwoo Choi 提交于
This patch removes duplicat 'interrupt-parent' property for Exynos3250 because exynos3250.dtsi already defined 'interrupt-parent' property as following: In arch/arm/boot/dts/exynos3250.dtsi: compatible = "samsung,exynos3250"; interrupt-parent = <&gic>; Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanwoo Choi 提交于
This patch add TMU (Thermal Management Unit) dt node to monitor the high temperature for Exynos3250. Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com> Acked-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NEduardo Valentin <edubezval@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
The IRQB interrupt pin of MAX77686 PMIC is connected to GPX3[2] pin of Exynos5250 on the Exynos5250 SMDK board. Specify this connection using interrupts property for the max77686 pmic node. Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Andreas Faerber 提交于
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts. Spring does not need it, it uses an Atmel maXTouch instead. Signed-off-by: NAndreas Faerber <afaerber@suse.de> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Andreas Faerber 提交于
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts. Spring does not need it, it uses an s5m8767 instead. Signed-off-by: NAndreas Faerber <afaerber@suse.de> Reviewed-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 29 7月, 2014 7 次提交
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由 Tony Lindgren 提交于
Commit 9188883f (ARM: dts: Enable twl4030 off-idle configuration for selected omaps) allowed n900 to cut off core voltages during off-idle. This however caused a regression where twl regulator vaux1 was not getting enabled for the LCD panel as we are not requesting it for the panel. Turns out quite a few devices on n900 are using vaux1, and we need to either stop idling it, or add proper regulator_get calls for all users. But until we have a proper solution implemented and tested, let's just disable the twl off-idle configuration for now for n900. Reported-by: NAaro Koskinen <aaro.koskinen@iki.fi> Fixes: 9188883f (ARM: dts: Enable twl4030 off-idle configuration for selected omaps) Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Soren Brinkmann 提交于
The DMA engine is enabled for all DTs that derive from zynq-7000.dtsi. There is no need to override the 'status' property in board DTs. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Michal Simek 提交于
Add node describing Zynq's CAN controller. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Reviewed-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
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由 Vikas Sajjan 提交于
Adds PMU DT node for exynos5260 SoC. Signed-off-by: NVikas Sajjan <vikas.sajjan@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Andreas Faerber 提交于
Exynos initialization code now relies on obtaining the PMU address, so prepare a PMU node for Exynos5410. Fixes: fce9e5bb ("ARM: EXYNOS: Add support for mapping PMU base address via DT") Signed-off-by: NAndreas Faerber <afaerber@suse.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Roger Quadros 提交于
Update the bindings for touchscreen size. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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由 Roger Quadros 提交于
Update the bindings for touchscreen size. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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- 28 7月, 2014 5 次提交
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由 Marc Carino 提交于
Add a sample DTS which will allow bootup of a board populated with the BCM7445 chip. Signed-off-by: NMarc Carino <marc.ceeeee@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Cc: Matt Porter <mporter@linaro.org> Signed-off-by: NMatt Porter <mporter@linaro.org>
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由 Benoit Masson 提交于
The Lenovo Iomega ix4-300d is a 4-Bay sata NAS with dual Gb, USB2.0 & 3.0, powered by a Marvell Armada XP MV78230 dual core CPU. http://shop.lenovo.com/us/en/servers/network-storage/lenovoemc/ix4-300d/Signed-off-by: NBenoit Masson <yahoo@perenite.com> Link: https://lkml.kernel.org/r/1406503839-4662-1-git-send-email-yahoo@perenite.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Alex Elder 提交于
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC. Signed-off-by: NAlex Elder <elder@linaro.org> Signed-off-by: NMatt Porter <mporter@linaro.org>
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由 Alex Elder 提交于
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC. Signed-off-by: NRay Jui <rjui@broadcom.com> Signed-off-by: NAlex Elder <elder@linaro.org> Signed-off-by: NMatt Porter <mporter@linaro.org>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 27 7月, 2014 2 次提交
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由 Beniamino Galvani 提交于
This adds a device tree node for the infrared receiver connected to a GPIO pin on the Radxa Rock. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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由 Beniamino Galvani 提交于
This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver. Signed-off-by: NBeniamino Galvani <b.galvani@gmail.com> Modified to use the new clock defines and added rk3066 pins. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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