- 07 8月, 2014 1 次提交
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由 Julia Lawall 提交于
Convert a zero return value on error to a negative one, as returned elsewhere in the function. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ identifier ret; expression e1,e2; @@ ( if (\(ret < 0\|ret != 0\)) { ... return ret; } | ret = 0 ) ... when != ret = e1 when != &ret *if(...) { ... when != ret = e2 when forall return ret; } // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
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- 07 4月, 2009 1 次提交
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由 Yang Hongyang 提交于
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 3月, 2009 1 次提交
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由 Huang Weiyi 提交于
Remove duplicated #include in arch/avr32/boards/hammerhead/flash.c. Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com> Acked-by: NAlex Raimondi <mailinglist@miromico.ch> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 05 1月, 2009 1 次提交
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由 Alex Raimondi 提交于
The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel. It offers versatile peripherals, such as ethernet, usb device, usb host etc. The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered Device (PD). Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which will cover even the most exceptional need of memory bandwidth. Together with the onboard video decoder the board is ready for video processing. This patch does include the basic support for the fpga device driver, but not the device driver itself. Signed-off-by: NAlex Raimondi <mailinglist@miromico.ch> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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