1. 20 9月, 2014 1 次提交
  2. 16 9月, 2014 2 次提交
    • A
      dsa: Replace mii_bus with a generic host device · b4d2394d
      Alexander Duyck 提交于
      This change makes it so that instead of passing and storing a mii_bus we
      instead pass and store a host_dev.  From there we can test to determine the
      exact type of device, and can verify it is the correct device for our switch.
      
      So for example it would be possible to pass a device pointer from a pci_dev
      and instead of checking for a PHY ID we could check for a vendor and/or device
      ID.
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b4d2394d
    • A
      dsa: Split ops up, and avoid assigning tag_protocol and receive separately · 5075314e
      Alexander Duyck 提交于
      This change addresses several issues.
      
      First, it was possible to set tag_protocol without setting the ops pointer.
      To correct that I have reordered things so that rcv is now populated before
      we set tag_protocol.
      
      Second, it didn't make much sense to keep setting the device ops each time a
      new slave was registered.  So by moving the receive portion out into root
      switch initialization that issue should be addressed.
      
      Third, I wanted to avoid sending tags if the rcv pointer was not registered
      so I changed the tag check to verify if the rcv function pointer is set on
      the root tree.  If it is then we start sending DSA tagged frames.
      
      Finally I split the device ops pointer in the structures into two spots.  I
      placed the rcv function pointer in the root switch since this makes it
      easiest to access from there, and I placed the xmit function pointer in the
      slave for the same reason.
      Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5075314e
  3. 14 9月, 2014 1 次提交
  4. 28 8月, 2014 7 次提交
  5. 16 7月, 2014 1 次提交
    • T
      net: set name_assign_type in alloc_netdev() · c835a677
      Tom Gundersen 提交于
      Extend alloc_netdev{,_mq{,s}}() to take name_assign_type as argument, and convert
      all users to pass NET_NAME_UNKNOWN.
      
      Coccinelle patch:
      
      @@
      expression sizeof_priv, name, setup, txqs, rxqs, count;
      @@
      
      (
      -alloc_netdev_mqs(sizeof_priv, name, setup, txqs, rxqs)
      +alloc_netdev_mqs(sizeof_priv, name, NET_NAME_UNKNOWN, setup, txqs, rxqs)
      |
      -alloc_netdev_mq(sizeof_priv, name, setup, count)
      +alloc_netdev_mq(sizeof_priv, name, NET_NAME_UNKNOWN, setup, count)
      |
      -alloc_netdev(sizeof_priv, name, setup)
      +alloc_netdev(sizeof_priv, name, NET_NAME_UNKNOWN, setup)
      )
      
      v9: move comments here from the wrong commit
      Signed-off-by: NTom Gundersen <teg@jklm.no>
      Reviewed-by: NDavid Herrmann <dh.herrmann@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c835a677
  6. 14 5月, 2014 1 次提交
  7. 22 1月, 2014 1 次提交
  8. 04 9月, 2013 1 次提交
  9. 22 1月, 2013 1 次提交
    • F
      dsa: use an unique and non conflicting bus name for the slave MII bus · f490be04
      Florian Fainelli 提交于
      The slave MII bus registered by the DSA code is using the parent MII bus
      as part of its name (ds->master_mii_bus_id), in case the parent MII bus
      name is already 16 characters long (such as d0072004.mdio-mi) we will
      get the following WARN_ON in dsa_switch_setup() when calling
      mdiobus_register():
      
      [   79.088782] ------------[ cut here ]------------
      [   79.093448] WARNING: at fs/sysfs/dir.c:536 sysfs_add_one+0x80/0xa0()
      [   79.099831] sysfs: cannot create duplicate filename
      '/class/mdio_bus/d0072004.mdio-mi'
      
      This is a genuine warning, because the DSA slave MII bus will also be
      named d0072004.mdio-mi, and since MII_BUS_ID_SIZE is 17 characters long
      (with null-terminator) the following will truncate the slave MII bus id:
      
      snprintf(ds->slave_mii_bus->id, MII_BUS_ID_SIZE, "%s-%d:%.2x",
                              ds->master_mii_bus->id, ds->pd->sw_addr);
      
      Fix this by using dsa-<switch index->:<sw_add> which is guaranteed to be
      unique.
      Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      f490be04
  10. 15 1月, 2013 1 次提交
  11. 07 1月, 2013 1 次提交
  12. 10 5月, 2012 1 次提交
    • J
      dsa: Convert compare_ether_addr to ether_addr_equal · 8feedbb4
      Joe Perches 提交于
      Use the new bool function ether_addr_equal to add
      some clarity and reduce the likelihood for misuse
      of compare_ether_addr for sorting.
      
      Done via cocci script:
      
      $ cat compare_ether_addr.cocci
      @@
      expression a,b;
      @@
      -	!compare_ether_addr(a, b)
      +	ether_addr_equal(a, b)
      
      @@
      expression a,b;
      @@
      -	compare_ether_addr(a, b)
      +	!ether_addr_equal(a, b)
      
      @@
      expression a,b;
      @@
      -	!ether_addr_equal(a, b) == 0
      +	ether_addr_equal(a, b)
      
      @@
      expression a,b;
      @@
      -	!ether_addr_equal(a, b) != 0
      +	!ether_addr_equal(a, b)
      
      @@
      expression a,b;
      @@
      -	ether_addr_equal(a, b) == 0
      +	!ether_addr_equal(a, b)
      
      @@
      expression a,b;
      @@
      -	ether_addr_equal(a, b) != 0
      +	ether_addr_equal(a, b)
      
      @@
      expression a,b;
      @@
      -	!!ether_addr_equal(a, b)
      +	ether_addr_equal(a, b)
      Signed-off-by: NJoe Perches <joe@perches.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8feedbb4
  13. 29 11月, 2011 1 次提交
  14. 27 11月, 2011 1 次提交
  15. 18 8月, 2011 1 次提交
  16. 20 4月, 2011 1 次提交
  17. 19 7月, 2010 1 次提交
  18. 04 4月, 2010 1 次提交
  19. 30 5月, 2009 1 次提交
    • J
      net: convert unicast addr list · ccffad25
      Jiri Pirko 提交于
      This patch converts unicast address list to standard list_head using
      previously introduced struct netdev_hw_addr. It also relaxes the
      locking. Original spinlock (still used for multicast addresses) is not
      needed and is no longer used for a protection of this list. All
      reading and writing takes place under rtnl (with no changes).
      
      I also removed a possibility to specify the length of the address
      while adding or deleting unicast address. It's always dev->addr_len.
      
      The convertion touched especially e1000 and ixgbe codes when the
      change is not so trivial.
      Signed-off-by: NJiri Pirko <jpirko@redhat.com>
      
       drivers/net/bnx2.c               |   13 +--
       drivers/net/e1000/e1000_main.c   |   24 +++--
       drivers/net/ixgbe/ixgbe_common.c |   14 ++--
       drivers/net/ixgbe/ixgbe_common.h |    4 +-
       drivers/net/ixgbe/ixgbe_main.c   |    6 +-
       drivers/net/ixgbe/ixgbe_type.h   |    4 +-
       drivers/net/macvlan.c            |   11 +-
       drivers/net/mv643xx_eth.c        |   11 +-
       drivers/net/niu.c                |    7 +-
       drivers/net/virtio_net.c         |    7 +-
       drivers/s390/net/qeth_l2_main.c  |    6 +-
       drivers/scsi/fcoe/fcoe.c         |   16 ++--
       include/linux/netdevice.h        |   18 ++--
       net/8021q/vlan.c                 |    4 +-
       net/8021q/vlan_dev.c             |   10 +-
       net/core/dev.c                   |  195 +++++++++++++++++++++++++++-----------
       net/dsa/slave.c                  |   10 +-
       net/packet/af_packet.c           |    4 +-
       18 files changed, 227 insertions(+), 137 deletions(-)
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ccffad25
  20. 22 3月, 2009 2 次提交
    • L
      dsa: add switch chip cascading support · e84665c9
      Lennert Buytenhek 提交于
      The initial version of the DSA driver only supported a single switch
      chip per network interface, while DSA-capable switch chips can be
      interconnected to form a tree of switch chips.  This patch adds support
      for multiple switch chips on a network interface.
      
      An example topology for a 16-port device with an embedded CPU is as
      follows:
      
      	+-----+          +--------+       +--------+
      	|     |eth0    10| switch |9    10| switch |
      	| CPU +----------+        +-------+        |
      	|     |          | chip 0 |       | chip 1 |
      	+-----+          +---++---+       +---++---+
      	                     ||               ||
      	                     ||               ||
      	                     ||1000baseT      ||1000baseT
      	                     ||ports 1-8      ||ports 9-16
      
      This requires a couple of interdependent changes in the DSA layer:
      
      - The dsa platform driver data needs to be extended: there is still
        only one netdevice per DSA driver instance (eth0 in the example
        above), but each of the switch chips in the tree needs its own
        mii_bus device pointer, MII management bus address, and port name
        array. (include/net/dsa.h)  The existing in-tree dsa users need
        some small changes to deal with this. (arch/arm)
      
      - The DSA and Ethertype DSA tagging modules need to be extended to
        use the DSA device ID field on receive and demultiplex the packet
        accordingly, and fill in the DSA device ID field on transmit
        according to which switch chip the packet is heading to.
        (net/dsa/tag_{dsa,edsa}.c)
      
      - The concept of "CPU port", which is the switch chip port that the
        CPU is connected to (port 10 on switch chip 0 in the example), needs
        to be extended with the concept of "upstream port", which is the
        port on the switch chip that will bring us one hop closer to the CPU
        (port 10 for both switch chips in the example above).
      
      - The dsa platform data needs to specify which ports on which switch
        chips are links to other switch chips, so that we can enable DSA
        tagging mode on them.  (For inter-switch links, we always use
        non-EtherType DSA tagging, since it has lower overhead.  The CPU
        link uses dsa or edsa tagging depending on what the 'root' switch
        chip supports.)  This is done by specifying "dsa" for the given
        port in the port array.
      
      - The dsa platform data needs to be extended with information on via
        which port to reach any given switch chip from any given switch chip.
        This info is specified via the per-switch chip data struct ->rtable[]
        array, which gives the nexthop ports for each of the other switches
        in the tree.
      
      For the example topology above, the dsa platform data would look
      something like this:
      
      	static struct dsa_chip_data sw[2] = {
      		{
      			.mii_bus	= &foo,
      			.sw_addr	= 1,
      			.port_names[0]	= "p1",
      			.port_names[1]	= "p2",
      			.port_names[2]	= "p3",
      			.port_names[3]	= "p4",
      			.port_names[4]	= "p5",
      			.port_names[5]	= "p6",
      			.port_names[6]	= "p7",
      			.port_names[7]	= "p8",
      			.port_names[9]	= "dsa",
      			.port_names[10]	= "cpu",
      			.rtable		= (s8 []){ -1, 9, },
      		}, {
      			.mii_bus	= &foo,
      			.sw_addr	= 2,
      			.port_names[0]	= "p9",
      			.port_names[1]	= "p10",
      			.port_names[2]	= "p11",
      			.port_names[3]	= "p12",
      			.port_names[4]	= "p13",
      			.port_names[5]	= "p14",
      			.port_names[6]	= "p15",
      			.port_names[7]	= "p16",
      			.port_names[10]	= "dsa",
      			.rtable		= (s8 []){ 10, -1, },
      		},
      	},
      
      	static struct dsa_platform_data pd = {
      		.netdev		= &foo,
      		.nr_switches	= 2,
      		.sw		= sw,
      	};
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NGary Thomas <gary@mlbassoc.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e84665c9
    • L
      dsa: set ->iflink on slave interfaces to the ifindex of the parent · c0840801
      Lennert Buytenhek 提交于
      ..so that we can parse the DSA topology from 'ip link' output:
      
      1: lo: <LOOPBACK,UP,LOWER_UP> mtu 16436 qdisc noqueue
      2: eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc pfifo_fast qlen 1000
      3: eth1: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc pfifo_fast qlen 1000
      4: lan1@eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc noqueue
      5: lan2@eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc noqueue
      6: lan3@eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc noqueue
      7: lan4@eth0: <NO-CARRIER,BROADCAST,MULTICAST,UP> mtu 1500 qdisc noqueue
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c0840801
  21. 07 1月, 2009 1 次提交
  22. 11 11月, 2008 2 次提交
  23. 09 10月, 2008 3 次提交
    • L
      dsa: add support for Trailer tagging format · 396138f0
      Lennert Buytenhek 提交于
      This adds support for the Trailer switch tagging format.  This is
      another tagging that doesn't explicitly mark tagged packets with a
      distinct ethertype, so that we need to add a similar hack in the
      receive path as for the Original DSA tagging format.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NByron Bradley <byron.bbradley@gmail.com>
      Tested-by: NTim Ellis <tim.ellis@mac.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      396138f0
    • L
      dsa: add support for original DSA tagging format · cf85d08f
      Lennert Buytenhek 提交于
      Most of the DSA switches currently in the field do not support the
      Ethertype DSA tagging format that one of the previous patches added
      support for, but only the original DSA tagging format.
      
      The original DSA tagging format carries the same information as the
      Ethertype DSA tagging format, but with the difference that it does not
      have an ethertype field.  In other words, when receiving a packet that
      is tagged with an original DSA tag, there is no way of telling in
      eth_type_trans() that this packet is in fact a DSA-tagged packet.
      
      This patch adds a hook into eth_type_trans() which is only compiled in
      if support for a switch chip that doesn't support Ethertype DSA is
      selected, and which checks whether there is a DSA switch driver
      instance attached to this network device which uses the old tag format.
      If so, it sets the protocol field to ETH_P_DSA without looking at the
      packet, so that the packet ends up in the right place.
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NNicolas Pitre <nico@marvell.com>
      Tested-by: NPeter van Valderen <linux@ddcrew.com>
      Tested-by: NDirk Teurlings <dirk@upexia.nl>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cf85d08f
    • L
      net: Distributed Switch Architecture protocol support · 91da11f8
      Lennert Buytenhek 提交于
      Distributed Switch Architecture is a protocol for managing hardware
      switch chips.  It consists of a set of MII management registers and
      commands to configure the switch, and an ethernet header format to
      signal which of the ports of the switch a packet was received from
      or is intended to be sent to.
      
      The switches that this driver supports are typically embedded in
      access points and routers, and a typical setup with a DSA switch
      looks something like this:
      
      	+-----------+       +-----------+
      	|           | RGMII |           |
      	|           +-------+           +------ 1000baseT MDI ("WAN")
      	|           |       |  6-port   +------ 1000baseT MDI ("LAN1")
      	|    CPU    |       |  ethernet +------ 1000baseT MDI ("LAN2")
      	|           |MIImgmt|  switch   +------ 1000baseT MDI ("LAN3")
      	|           +-------+  w/5 PHYs +------ 1000baseT MDI ("LAN4")
      	|           |       |           |
      	+-----------+       +-----------+
      
      The switch driver presents each port on the switch as a separate
      network interface to Linux, polls the switch to maintain software
      link state of those ports, forwards MII management interface
      accesses to those network interfaces (e.g. as done by ethtool) to
      the switch, and exposes the switch's hardware statistics counters
      via the appropriate Linux kernel interfaces.
      
      This initial patch supports the MII management interface register
      layout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and
      supports the "Ethertype DSA" packet tagging format.
      
      (There is no officially registered ethertype for the Ethertype DSA
      packet format, so we just grab a random one.  The ethertype to use
      is programmed into the switch, and the switch driver uses the value
      of ETH_P_EDSA for this, so this define can be changed at any time in
      the future if the one we chose is allocated to another protocol or
      if Ethertype DSA gets its own officially registered ethertype, and
      everything will continue to work.)
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Tested-by: NNicolas Pitre <nico@marvell.com>
      Tested-by: NByron Bradley <byron.bbradley@gmail.com>
      Tested-by: NTim Ellis <tim.ellis@mac.com>
      Tested-by: NPeter van Valderen <linux@ddcrew.com>
      Tested-by: NDirk Teurlings <dirk@upexia.nl>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      91da11f8