This enables the STMPE MFD, GPIO and keypad support by default on
the Nomadik builds. This expander is used on the NDK 15 board.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This updates the Nomadik (NHK8815) defconfig to what saveconfig
produces after some recent changes to Kconfig fragments here
and there.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add the missing CAN devices node including their pin muxing. The required
clock node already exists.
Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add the missing CAN devices node including their pin muxing to the shared
.dtsi for at91sam9x5. Actually include this file.
Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This patch adds usart dma definitions to both dtsi for sam9x5 chips. Without
usage of dma it's unable to catch all bytes on usart receiver.
Signed-off-by: NJiri Prchal <jiri.prchal@aksignal.cz>
Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

This adds a device tree for the Nomadik NHK15 development kit
board.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The SoC file defines the location and type of the ethernet
adapter, this should be in the per-board file, as it is by no
means necessary to have an ethernet adapter connected to this
memory space.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This extra data line for high-speed MMC transfers was unrouted,
set it up properly in the dtsi file.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The idea to use two GPIO pins for bit-banged I2C is an S8815
pecularity, so move this over to the board-specific file and
out of the SoC core DTSI file.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Do not force disable the chrystals in the SoC file, this is
per-board dependent.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This pushes the setting of the card detect GPIO pin down into
the top-level file for the board, since it is not a property of
the ASIC (which this DTSI is about) but a property of the board
design.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

With legacy booting, the platform init code was taking care of
the configuring of GPIOs. With device tree based booting, things
may or may not work depending what bootloader has configured or
if the legacy platform code gets called.

Let's add support for the pwrdn and reset GPIOs to the smc91x
driver to fix the issues of smc91x not working properly when
booted in device tree mode.

And let's change n900 to use these settings as some versions
of the bootloader do not configure things properly causing
errors.
Reported-by: NKevin Hilman <khilman@linaro.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

Patch adds DT entries for clockgen A9
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: NOlivier Bideau <olivier.bideau@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

Patch adds DT entries for clockgen D0/D2/D3
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: NOlivier Bideau <olivier.bideau@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

Patch adds DT entries for clockgen C0
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: NOlivier Bideau <olivier.bideau@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

Patch adds DT entries for clockgen A0
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: NOlivier Bideau <olivier.bideau@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

ARM: DT: STi: STiH416: Add DT node for ST's SATA device

Cc: devicetree@vger.kernel.org
Acked-by: NAlexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

The MiPHY365x is a Generic PHY which can serve various SATA or PCIe
devices. It has 2 ports which it can use for either; both SATA, both
PCIe or one of each in any configuration.
Acked-by: NMark Rutland <mark.rutland@arm.com>
Acked-by: NAlexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

We supply two of these.  The first is controlled by the System Configuration
registers and the second one provided is a more traditional 'memory mapped'
variant.  Each are handled by they own sub-driver.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

The second controller is only present on the stih416 SoC. Also
mark this as non-removeable as its eMMC.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

Because the first sdhci controller is present on both stih415 and
stih416 SoC which can both populate the b2020 board, it can be
enabled in the generic DT file.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

This patch adds device tree config for the sdhci controller
on the stih415 SoC.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

This patch adds the required pin config for the sdhci controller
present in the stih415 SoC.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

This patch adds device tree config for both sdhci controllers
on the stih416 SoC.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

This adds the required pin config for both SDHCI controllers on
the stih416 SoC.
Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

This patch adds the reset controller DT nodes for the powerdown,
 softreset and picophy controllers.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

The STiH407 is a STMicroelectronics Digital Consumer electronics
family, targetted at set-top-box and other audio/video applications.

This patch selects the reset controller driver for this family which
is essential to take various IP's on the SoC out of powerdown / reset.
Signed-off-by: NPeter Griffin <peter.griffin@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

Suggested-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>

DT files to enable cygnus consisting on reference designs
and cygnus core configuration.
Reviewed-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NArun Parameswaran <aparames@broadcom.com>
Tested-by: NJonathan Richardson <jonathar@broadcom.com>
Reviewed-by: NJD (Jiandong) Zheng <jdzheng@broadcom.com>
Signed-off-by: NScott Branden <sbranden@broadcom.com>

Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The DU device is now instantiated from the device tree, remove the
corresponding platform device.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The DU device is now instantiated from the device tree, remove the
corresponding platform device.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Specify the DU output topology, enable the DU device and configure the
related pins.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

With SDHCI for BG2, we can now enable the port and allow to access
Samsung M8G2FA 8GB eMMC on Sony NSZ-GS7.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

With SDHCI for BG2CD, we can now enable the port and allow to access
AzureWave WiFi/BT module on Google Chromecast.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Marvell Berlin BG2 has three, BG2CD just one pxav3 compatible
sdhci controllers, add them to the corresponding DT SoC
includes.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Marvell Berlin BG2 based Sony NSZ-GS7 has one ethernet controller
connected to rear RJ45 jack. Enable it by default.
Tested-by: NAntoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>