1. 28 7月, 2014 2 次提交
    • A
      ARM: configs: enable SMP in bcm_defconfig · 67115239
      Alex Elder 提交于
      Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
      currently need.
      Signed-off-by: NRay Jui <rjui@broadcom.com>
      Signed-off-by: NAlex Elder <elder@linaro.org>
      Signed-off-by: NMatt Porter <mporter@linaro.org>
      67115239
    • A
      ARM: add SMP support for Broadcom mobile SoCs · 9a5a110e
      Alex Elder 提交于
      This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
      
      This feature is controlled with a distinct config option such that
      an SMP-enabled multi-v7 binary can be configured to run these SoCs
      in uniprocessor mode.  Since this SMP functionality is used for
      multiple Broadcom mobile chip families the config option is called
      ARCH_BCM_MOBILE_SMP (for lack of a better name).
      
      On SoCs of this type, the secondary core is not held in reset on
      power-on.  Instead it loops in a ROM-based holding pen.  To release
      it, one must write into a special register a jump address whose
      low-order bits have been replaced with a secondary core's id, then
      trigger an event with SEV.  On receipt of an event, the ROM code
      will examine the register's contents, and if the low-order bits
      match its cpu id, it will clear them and write the value back to the
      register just prior to jumping to the address specified.
      
      The location of the special register is defined in the device tree
      using a "secondary-boot-reg" property in a node whose "enable-method"
      matches.
      
      Derived from code originally provided by Ray Jui <rjui@broadcom.com>
      Signed-off-by: NAlex Elder <elder@linaro.org>
      Signed-off-by: NMatt Porter <mporter@linaro.org>
      9a5a110e
  2. 21 7月, 2014 9 次提交
  3. 20 7月, 2014 11 次提交
  4. 19 7月, 2014 18 次提交