- 10 12月, 2015 1 次提交
-
-
由 Gabriel Laskar 提交于
Using `#include "drm.h"` instead of `#include <drm/drm.h>` allow drm headers to be moved in another directory without changes, like for the libdrm imports. Signed-off-by: NGabriel Laskar <gabriel@lse.epita.fr> Reviewed-by: NEmil Velikov <emil.l.velikov@gmail.com> CC: Emil Velikov <emil.l.velikov@gmail.com> CC: Mikko Rapeli <mikko.rapeli@iki.fi>
-
- 03 4月, 2015 1 次提交
-
-
由 Sean Paul 提交于
On 64-bit targets, tegra_gem_mmap() only returns a partial offset to userspace. As such, subsequent calls to mmap(2) may fail. Change the arguments to use a 64-bit offset to fix this. Signed-off-by: NSean Paul <seanpaul@chromium.org> Acked-by: NErik Faye-Lund <kusmabite@gmail.com> [treding@nvidia.com: tweak commit message] Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 04 8月, 2014 2 次提交
-
-
由 Thierry Reding 提交于
The DRM_TEGRA_GEM_SET_FLAGS IOCTL can be used to set the flags of a buffer object after it has been allocated or imported. Flags associated with a buffer object can be queried using the DRM_TEGRA_GEM_GET_FLAGS IOCTL. Reviewed-by: NStéphane Marchesin <marcheu@chromium.org> Tested-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
Currently the tiling parameters of buffer objects can only be set at allocation time, and only a single tiled mode is supported. This new DRM_TEGRA_GEM_SET_TILING IOCTL allows more modes to be set and also allows the tiling mode to be changed after the allocation. This will enable the Tegra DRM driver to import buffers from a GPU and directly scan them out by configuring the display controller appropriately. To complement this, the DRM_TEGRA_GEM_GET_TILING IOCTL can query the current tiling mode of a buffer object. This is necessary when importing buffers via handle (as is done in Mesa for example) so that userspace can determine the proper parameters for the 2D or 3D engines. Reviewed-by: NStéphane Marchesin <marcheu@chromium.org> Tested-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 16 4月, 2014 1 次提交
-
-
由 Thierry Reding 提交于
The version of the drm_tegra_submit structure that was merged all the way back in 3.10 contains a pad field that was originally intended to properly pad the following __u64 field. Unfortunately it seems like a different field was dropped during review that caused this padding to become unnecessary, but the pad field wasn't removed at that time. One possible side-effect of this is that since the __u64 following the pad is now no longer properly aligned, the compiler may (or may not) introduce padding itself, which results in no predictable ABI. Rectify this by removing the pad field so that all fields are again naturally aligned. Technically this is breaking existing userspace ABI, but given that there aren't any (released) userspace drivers that make use of this yet, the fallout should be minimal. Fixes: d43f81cb ("drm/tegra: Add gr2d device") Cc: <stable@vger.kernel.org> # 3.10 Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 04 4月, 2014 1 次提交
-
-
由 Thierry Reding 提交于
This file will eventually be exported to libdrm, where all the public header files use the MIT license. Reported-by: NErik Faye-Lund <kusmabite@gmail.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NEmil Goode <emilgoode@gmail.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 31 10月, 2013 3 次提交
-
-
由 Arto Merilainen 提交于
This patch adds a separate ioctl for delivering syncpoint base number to user space. If the syncpoint does not have an associated base, the function returns -ENXIO. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Reviewed-by: NTerje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
由 Thierry Reding 提交于
The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThierry Reding <treding@nvidia.com>
-
- 22 6月, 2013 1 次提交
-
-
由 Emil Goode 提交于
Include definitions of used types by including drm/drm.h Sparse output: /usr/include/drm/tegra_drm.h:21: found __[us]{8,16,32,64} type without #include <linux/types.h> Signed-off-by: NEmil Goode <emilgoode@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@gmail.com>
-
- 22 4月, 2013 1 次提交
-
-
由 Terje Bergstrom 提交于
Add client driver for 2D device, and IOCTLs to pass work to host1x channel for 2D. Also adds functions that can be called to access sync points from DRM. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
-