1. 10 3月, 2014 3 次提交
    • E
      iwlwifi: mvm: fix scan offload for BGN SKU · 66092537
      Emmanuel Grumbach 提交于
      BGN SKU won't scan on 5.2GHz obviously, but the firmware
      still expects the driver to reserve space for the the probe
      request for the 5.2GHz band.
      Fix this by allocating space and leave it empty.
      
      This fixes https://bugzilla.kernel.org/show_bug.cgi?id=69541Reviewed-by: NJohannes Berg <johannes.berg@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      66092537
    • J
      iwlwifi: return whether to stop from rfkill method · 14cfca71
      Johannes Berg 提交于
      When indicating RF-kill toggle to the higher layer, that
      may in turn call back to the transport (for MVM at least)
      to turn off the device quickly. Instead of that, allow it
      to return whether or not the device should be turned off,
      this gets rid of the call indirection and will help make
      the API more consistent when we go back to non-threaded
      interrupts again for PCIe.
      Signed-off-by: NJohannes Berg <johannes.berg@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      14cfca71
    • A
      iwlwifi: pcie: enable LP XTAL to reduce power consumption · a812cba9
      Alexander Bondar 提交于
      1. Enable LP XTAL to avoid HW bug where device may consume much
      power if FW is not loaded after device reset. LP XTAL is
      disabled by default after device HW reset. Configure device's
      "persistence" mode to avoid resetting XTAL again when SHRD_HW_RST
      occurs in S3.
      
      2. Add methods to access SHR (shared block memory space) directly from PCI
      bus w/o need to power up MAC HW.
      
      Shared internal registers (e.g. SHR_APMG_GP1, SHR_APMG_XTAL_CFG)can be
      accessed directly from PCI bus through SHR arbiter even when MAC HW is
      powered down. This is possible due to indirect read/write via
      HEEP_CTRL_WRD_PCIEX_CTRL (0xEC) and HEEP_CTRL_WRD_PCIEX_DATA (0xF4)
      registers.
      
      Use iwl_write32()/iwl_read32() family to access these registers. The MAC HW
      need not be powered up so no "grab inc access" is required.
      
      For example, to read from SHR_APMG_GP1 register (0x1DC),
      first, write to the control register:
      HEEP_CTRL_WRD_PCIEX_CTRL[15:0] = 0x1DC (offset of the SHR_APMG_GP1 register)
      HEEP_CTRL_WRD_PCIEX_CTRL[29:28] = 2 (read access)
      second, read from the data register HEEP_CTRL_WRD_PCIEX_DATA[31:0].
      
      To write the register, first, write to the data register
      HEEP_CTRL_WRD_PCIEX_DATA[31:0] and then:
      HEEP_CTRL_WRD_PCIEX_CTRL[15:0] = 0x1DC (offset of the SHR_APMG_GP1 register)
      HEEP_CTRL_WRD_PCIEX_CTRL[29:28] = 3 (write access)
      Signed-off-by: NAlexander Bondar <alexander.bondar@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      a812cba9
  2. 09 3月, 2014 6 次提交
  3. 01 3月, 2014 31 次提交