This adds support for DMA transfers through the generic DMA engine
framework with the DMA slave extensions.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 7.5 MiB/s on fast cards with debugging disabled.

Unfortunately, the driver has been known to lock up from time to time
with DMA enabled, so DMA support is currently optional and marked
EXPERIMENTAL. However, I didn't see any problems while testing 13
different cards (MMC, SD and SDHC of different brands and sizes), so I
suspect the "Initialize BLKR before sending data transfer command" fix
that was posted earlier fixed this as well.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Add the necessary platform infrastructure to support multiple mmc/sdcard
slots all at once through a single controller. Currently, the driver
will use the first valid slot it finds and stick with that, but later
patches will add support for switching between several slots on the fly.

Extend the platform data structure with per-slot information: MMC/SDcard
bus width and card detect/write protect pins. This will affect the pin
muxing as well as the capabilities announced to the mmc core.

Note that board code is now required to supply a mci_platform_data
struct to at32_add_device_mci().
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Introduce a few helper functions for HMATRIX configuration and clean up
the register definitions. Also add definitions for the HMATRIX master
and slave IDs on the AT32AP700x chips.

Also make the definitions in hmatrix.h available to board code by moving
it to <mach/hmatrix.h>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Update all avr32-specific files to use the new platform-specific header
locations. Drivers shared with ARM are left alone for now.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Minor cleanups for the MMC/SD support on avr32:

 - Make at32_add_device_mci() properly initialize "missing"
   platform data ... so boards like STK1002 won't try GPIO 0.

 - Switch over to gpio_is_valid() instead of testing for only
   one designated value.

 - Provide STK1002 platform data for the unlikely case that
   switches are set so first Ethernet controller isn't in use.
   (That's the only way to get card detect and writeprotect
   switch sensing on the STK1000.)

And get rid of one "unused variable" warning.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch adds platform data to the AC97C platform device. This will
let the board add a GPIO line which is connected to the external codecs
reset line.

The platform data, ac97c_platform_data, must also contain the DMA
controller ID, RX channel ID and TX channel ID.

Tested with Wolfson WM9712 and AP7000.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch does a few small cleanups around the atmel mci platform code
and in the atmel-mci driver.  The platform changes simply removes an
unused variable, uses the fact that by the end we always have some form
of platform data and notes that GPIO_PIN_NONE != 0.  This last point
could cause the incorrect attempt to twice reserve pin PA0.

While we've got the hood up, add linux/err.h to the atmel-mci.c include
list.  It needs it and generally pulls it by voodoo but I did once
stumble across a config which don't build.

This is against Linus' latest git.
Signed-off-by: NBen Nizette <bn@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.

This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.

This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)

Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.

The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.

Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

This adds a driver for the Synopsys DesignWare DMA controller (aka
DMACA on AVR32 systems.) This DMA controller can be found integrated
on the AT32AP7000 chip and is primarily meant for peripheral DMA
transfer, but can also be used for memory-to-memory transfers.

This patch is based on a driver from David Brownell which was based on
an older version of the DMA Engine framework. It also implements the
proposed extensions to the DMA Engine API for slave DMA operations.

The dmatest client shows no problems, but there may still be room for
improvement performance-wise. DMA slave transfer performance is
definitely "good enough"; reading 100 MiB from an SD card running at ~20
MHz yields ~7.2 MiB/s average transfer rate.

Full documentation for this controller can be found in the Synopsys
DW AHB DMAC Databook:

http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf

The controller has lots of implementation options, so it's usually a
good idea to check the data sheet of the chip it's intergrated on as
well. The AT32AP7000 data sheet can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682


Changes since v4:
  * Use client_count instead of dma_chan_is_in_use()
  * Add missing include
  * Unmap buffers unless client told us not to

Changes since v3:
  * Update to latest DMA engine and DMA slave APIs
  * Embed the hw descriptor into the sw descriptor
  * Clean up and update MODULE_DESCRIPTION, copyright date, etc.

Changes since v2:
  * Dequeue all pending transfers in terminate_all()
  * Rename dw_dmac.h -> dw_dmac_regs.h
  * Define and use controller-specific dma_slave data
  * Fix up a few outdated comments
  * Define hardware registers as structs (doesn't generate better
    code, unfortunately, but it looks nicer.)
  * Get number of channels from platform_data instead of hardcoding it
    based on CONFIG_WHATEVER_CPU.
  * Give slave clients exclusive access to the channel

Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>,
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

Add SRAM allocator for avr32, which is just a thin wrapper around
genalloc.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The SDRAM controller needs a clock in order to respond to our
commands, and suspend doesn't work very well without the SDRAM in
self-refresh mode.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Combine at32_clock_init() and at32_portmux_init() into
setup_platform() and remove setup_platform() from at32ap.c. No
functional change since all setup_platform() ever did was call those
two functions.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The name "mck" causes a conflict on AT91. Call it "pwm_clk" instead.
Signed-off-by: NSedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This is a minor tweak to the at32ap700x pin configuration for the SPI
input pin (MISO), enabling the on-chip weak pullup (typical 190K) to

  (a) ensure a fixed data value for missing or input-only slaves;

  (b) prevent power waste associated with inputs floating near VDDIO/2.

Atmel's boards have no external pullup or pulldown on these pins, so
it's unlikely other boards would address these issues with external
pulldowns.  Were there trouble, board-specific code could turn off
the relevant pullup(s).
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch adds the PS/2 interface (PSIF) to the device code, split into
two platform devices, one for each port.

The function for adding the PSIF platform device is also added to the
board header file.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch lets the board code choose which pin out to use for the LCD
interface.

On AT32AP7000 the LCDC is wired to two sets of pins, which lets the user
choose between dual ethernet and 32-bit EBI. For the ATNGW100 board it
is vital to have the choice to select the alternative pinout since this
pinout is routed to the external headers.

Update ATSTK1002 and ATSTK1004 to use the new interface.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

On our custom board we have other oscillator rates than on atngw100 and
atstk100x.

Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c.

This patch moves them into board specific code.
Signed-off-by: NAlex Raimondi <raimondi@miromico.ch>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This function initializes and adds a platform_device for a NAND flash
interface on SMC chip select 3.
Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

This patch is a take two of adding full functionality to PLL1 on
AT32AP7000.  This allows board-specific code and drivers to configure
and enable PLL1. This is useful when precise control over the
frequency of e.g. a genclock is needed and requested by users for the
ABDAC device.

The patch is based upon previous patches from both Haavard Skinnemoen
and David Brownell.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This combines three patches from David Brownell:
  * avr32: tclib support
  * avr32: simplify clocksources
  * avr32: Turn count/compare into a oneshot clockevent device

Register both TC blocks (instead of just the first one) so that
the AT32/AT91 tclib code will pick them up (instead of just the
avr32-only PIT-style clocksource).

Rename the first one and its resources appropriately.

More cleanups to the cycle counter clocksource code

 - Disable all the weak symbol magic; remove the AVR32-only TCB-based
   clocksource code (source and header).

 - Mark the __init code properly.

 - Don't forget to report IRQF_TIMER.

 - Make the system work properly with this clocksource, by preventing
   use of the CPU "idle" sleep state in the idle loop when it's used.

Package the avr32 count/compare timekeeping support as a oneshot
clockevent device, so it supports NO_HZ and high res timers.
This means it also supports plugging in other clockevent devices
and clocksources.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

New-style I2C drivers require that motherboard-mounted I2C devices are
registered with the I2C core, typically at arch_initcall time.  This
can be done nice and neat by passing the struct i2c_board_info[]
through at32_add_device_twi just like we do for the SPI board info.

While we've got the hood up, remove a duplicate declaration of
at32_add_device_twi() in board.h.

[hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration]
Signed-Off-By: NBen Nizette <bn@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The atmel_usba_udc driver is being used by several platforms and arches
(avr32 and at91 ATM), and each platform may have different endpoint
settings.

The patch below moves the endpoint declarations into the platform
data and make the necessary adjustments for AVR32 (improved by
Haavard Skinnemoen <hskinnemoen@atmel.com>).
Signed-off-by: NStelian Pop <stelian@popies.net>
Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

PWM device setup, and a simple PWM driver exposing a programming interface
giving access to each channel's full capabilities.  Note that this doesn't
support starting several channels in synch.

[hskinnemoen@atmel.com: allocate platform device dynamically]
[hskinnemoen@atmel.com: Kconfig fix]
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Change the NMI handler to use the die notifier chain to signal anyone
who cares. Add a simple "nmi debugger" which hooks into this chain and
that may dump registers, task state, etc. when it happens.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

These are derivatives of the AT32AP7000 chip, which means that most of
the code stays the same. Rename a few files, functions, definitions
and config symbols to reflect that they apply to all AP700x chips, and
exclude some platform devices from chips where they aren't present.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

There's a duplicate clock index between USART0 and USART1 which may be
causing system crashes when USART0 is used.  Change the USART0 index
to '3', indicating the clock that is actually used by USART0.
Signed-off-by: NBen Nizette <ben@niasdigital.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch extends the I/O resource to 0xfff000cf which will enable the
watchdog driver to access the reset cause (RCAUSE) register. Making it
capable of reporting boot status.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement at32_add_device_cf() which will add a platform_device for
the at32_cf driver (not merged yet). Separate out most of the
at32_add_device_ide() code and use it to implement
at32_add_device_cf() as well.

This changes the API in the following ways:
  * The board code must initialize data->cs to the chipselect ID to
    use before calling any of these functions.
  * The board code must use GPIO_PIN_NONE to indicate unused CF pins.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement functions for adding platform devices for TWI, MCI, AC97C
and ABDAC. They may need to be modified to cope with platform data,
etc. when the corresponding drivers are ready to be merged, but such
changes are much less likely to conflict than adding support for a
whole new type of device.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch adds platform code for PATA devices on the AP7000.

[hskinnemoen@atmel.com: board code left out for now since stk1000
	doesn't support IDE out of the box]
Signed-off-by: NKristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement at32_add_device_usba() and use it to wire up the USBA device
on ATSTK1000 and ATNGW100.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

We don't want to redefine this in every file that needs to access
the PM.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch adds register definitions, clocks and IRQs to the platform devices.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This patch enables CPU frequency scaling for AT32AP devices. This will
enable the CPU to scale between the speed of the high speed bus and
the master clock and thus save some power.

The patch also adds a parent to cpu_clk and a cpu_clk_set_rate to
enable changing the CPU clock divider in a sane way.

The driver does not check if the given rate is 0, thus resulting in a
div by 0.  I think this check should be go into the clk_set_rate
framework, and not here.

Tested on AT32AP7000/ATSTK1000.

Hardware documentation can be found in the AT32AP7000 datasheet.
Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Split the SM platform device into separate platform devices for PM,
RTC, WDT and EIC. This is more correct according to the documentation
and allows us to simplify the code a little.

Also turn the EIC driver into a real platform driver.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>

The current at32ap7000 platform devices aren't declared as supporting DMA,
so that layered drivers can't tell whether they need to manage DMA.

This patch makes all those platform devices report that they support DMA.
Most do, but in a few cases this is inappropriate.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This modifies and extends the existing lcdc platform code to support
the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use
the on-board Samsung LTV350QV LCD panel.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Bring the code that sets the initial PM clock masks in line with the
comment preceding it by only enabling clocks that have users != 0.
Fix SM clock definition and avr32_hpt_init() so that the SM and TC0
clocks keep ticking.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Due to limitation of the count-compare system timer (not able to
count when CPU is in sleep), the system timer had to be changed to
use a peripheral timer/counter.

The old COUNT-COMPARE code is still present in time.c as weak
functions. The new timer is added to the architecture directory.

This patch sets up TC0 as system timer The new timer has been tested
on AT32AP7000/ATSTK1000 at 100 Hz, 250 Hz, 300 Hz and 1000 Hz.

For more details about the timer/counter see the datasheet for
AT32AP700x available at

http://www.atmel.com/dyn/products/product_card.asp?part_id=3903Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

This adds register and clock definitions for the High-speed bus Matrix
(HMATRIX) as well as a function that can be used to configure special
EBI functionality like CompactFlash and NAND flash support.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>