1. 11 10月, 2013 1 次提交
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      powerpc: Put FP/VSX and VR state into structures · de79f7b9
      Paul Mackerras 提交于
      This creates new 'thread_fp_state' and 'thread_vr_state' structures
      to store FP/VSX state (including FPSCR) and Altivec/VSX state
      (including VSCR), and uses them in the thread_struct.  In the
      thread_fp_state, the FPRs and VSRs are represented as u64 rather
      than double, since we rarely perform floating-point computations
      on the values, and this will enable the structures to be used
      in KVM code as well.  Similarly FPSCR is now a u64 rather than
      a structure of two 32-bit values.
      
      This takes the offsets out of the macros such as SAVE_32FPRS,
      REST_32FPRS, etc.  This enables the same macros to be used for normal
      and transactional state, enabling us to delete the transactional
      versions of the macros.   This also removes the unused do_load_up_fpu
      and do_load_up_altivec, which were in fact buggy since they didn't
      create large enough stack frames to account for the fact that
      load_up_fpu and load_up_altivec are not designed to be called from C
      and assume that their caller's stack frame is an interrupt frame.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      de79f7b9
  2. 03 10月, 2013 2 次提交
  3. 14 8月, 2013 1 次提交
    • P
      powerpc: Fix VRSAVE handling · 408a7e08
      Paul Mackerras 提交于
      Since 2002, the kernel has not saved VRSAVE on exception entry and
      restored it on exit; rather, VRSAVE gets context-switched in _switch.
      This means that when executing in process context in the kernel, the
      userspace VRSAVE value is live in the VRSAVE register.
      
      However, the signal code assumes that current->thread.vrsave holds
      the current VRSAVE value, which is incorrect.  Therefore, this
      commit changes it to use the actual VRSAVE register instead.  (It
      still uses current->thread.vrsave as a temporary location to store
      it in, as __get_user and __put_user can only transfer to/from a
      variable, not an SPR.)
      
      This also modifies the transactional memory code to save and restore
      VRSAVE regardless of whether VMX is enabled in the MSR.  This is
      because accesses to VRSAVE are not controlled by the MSR.VEC bit,
      but can happen at any time.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      408a7e08
  4. 09 8月, 2013 1 次提交
    • M
      powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs · 28e61cc4
      Michael Neuling 提交于
      If a transaction is rolled back, the Target Address Register (TAR), Processor
      Priority Register (PPR) and Data Stream Control Register (DSCR) should be
      restored to the checkpointed values before the transaction began.  Any changes
      to these SPRs inside the transaction should not be visible in the abort
      handler.
      
      Currently Linux doesn't save or restore the checkpointed TAR, PPR or DSCR.  If
      we preempt a processes inside a transaction which has modified any of these, on
      process restore, that same transaction may be aborted we but we won't see the
      checkpointed versions of these SPRs.
      
      This adds checkpointed versions of these SPRs to the thread_struct and adds the
      save/restore of these three SPRs to the treclaim/trechkpt code.
      
      Without this if any of these SPRs are modified during a transaction, users may
      incorrectly see a speculated SPR value even if the transaction is aborted.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Cc: <stable@vger.kernel.org> [v3.10]
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      28e61cc4
  5. 30 6月, 2013 1 次提交
  6. 10 4月, 2013 1 次提交
  7. 15 2月, 2013 1 次提交