1. 22 3月, 2014 1 次提交
  2. 17 1月, 2014 1 次提交
  3. 16 1月, 2014 1 次提交
    • C
      gianfar: Fix portabilty issues for ethtool and ptp · 42851e88
      Claudiu Manoil 提交于
      Fixes unhandled register write in gianfar_ethtool.c.
      Fixes following endianess related functional issues,
      reported by sparse as well, i.e.:
      
      gianfar_ethtool.c:1058:33: warning:
          incorrect type in argument 1 (different base types)
          expected unsigned int [unsigned] [usertype] value
          got restricted __be32 [usertype] ip4src
      
      gianfar_ethtool.c:1164:33: warning:
          restricted __be16 degrades to integer
      
      gianfar_ethtool.c:1669:32: warning:
          invalid assignment: ^=
          left side has type restricted __be16
          right side has type int
      
      Solves all the sparse warnings for mixig normal pointers
      with __iomem pointers for gianfar_ptp.c, i.e.:
      gianfar_ptp.c:163:32: warning:
          incorrect type in argument 1 (different address spaces)
          expected unsigned int [noderef] <asn:2>*addr
          got unsigned int *<noident>
      Signed-off-by: NClaudiu Manoil <claudiu.manoil@freescale.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      42851e88
  4. 01 10月, 2013 3 次提交
  5. 26 5月, 2013 1 次提交
  6. 18 5月, 2013 1 次提交
  7. 25 4月, 2013 1 次提交
  8. 15 4月, 2013 1 次提交
  9. 25 10月, 2012 1 次提交
  10. 23 9月, 2012 1 次提交
  11. 22 9月, 2012 1 次提交
  12. 04 4月, 2012 1 次提交
  13. 17 3月, 2012 1 次提交
  14. 29 11月, 2011 1 次提交
    • A
      net/ethernet: convert drivers/net/ethernet/* to use module_platform_driver() · db62f684
      Axel Lin 提交于
      This patch converts the drivers in drivers/net/ethernet/* to use the
      module_platform_driver() macro which makes the code smaller and a bit
      simpler.
      
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Pantelis Antoniou <pantelis.antoniou@gmail.com>
      Cc: Vitaly Bordug <vbordug@ru.mvista.com>
      Cc: Wan ZongShun <mcuos.com@gmail.com>
      Cc: Nicolas Pitre <nico@fluxnic.net>
      Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
      Cc: Marc Kleine-Budde <mkl@pengutronix.de>
      Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
      Cc: Jiri Pirko <jpirko@redhat.com>
      Cc: Daniel Hellstrom <daniel@gaisler.com>
      Cc: Alexey Dobriyan <adobriyan@gmail.com>
      Cc: Tobias Klauser <tklauser@distanz.ch>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Jiri Kosina <jkosina@suse.cz>
      Cc: Richard Cochran <richard.cochran@omicron.at>
      Cc: Jonas Bonn <jonas@southpole.se>
      Cc: Sebastian Poehn <sebastian.poehn@belden.com>
      Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
      Cc: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
      Cc: "Michał Mirosław" <mirq-linux@rere.qmqm.pl>
      Signed-off-by: NAxel Lin <axel.lin@gmail.com>
      Acked-by: NWan ZongShun <mcuos.com@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      db62f684
  15. 12 8月, 2011 1 次提交
    • J
      freescale: Move the Freescale drivers · ec21e2ec
      Jeff Kirsher 提交于
      Move the Freescale drivers into drivers/net/ethernet/freescale/ and
      make the necessary Kconfig and Makefile changes.
      
      CC: Sandeep Gopalpet <sandeep.kumar@freescale.com>
      CC: Andy Fleming <afleming@freescale.com>
      CC: Shlomi Gridish <gridish@freescale.com>
      CC: Li Yang <leoli@freescale.com>
      CC: Pantelis Antoniou <pantelis.antoniou@gmail.com>
      CC: Vitaly Bordug <vbordug@ru.mvista.com>
      CC: Dan Malek <dmalek@jlc.net>
      CC: Sylvain Munaut <tnt@246tNt.com>
      Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
      ec21e2ec
  16. 08 8月, 2011 1 次提交
    • R
      gianfar: fix fiper alignment after resetting the time · cbc05660
      Richard Cochran 提交于
      After resetting the time, the PPS signals on the FIPER output channels
      are incorrectly offset from the clock time, as can be readily verified
      by a looping back the FIPER to the external time stamp input.
      
      Despite its name, setting the "Fiper Realignment Disable" bit seems to
      fix the problem, at least on the P2020.
      
      Also, following the example code from the Freescale BSP, it is not really
      necessary to disable and re-enable the timer in order to reprogram the
      FIPER. (The documentation is rather unclear on this point. It seems that
      writing to the alarm register also disables the FIPER.)
      Signed-off-by: NRichard Cochran <richard.cochran@omicron.at>
      Cc: <stable@kernel.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cbc05660
  17. 10 6月, 2011 1 次提交
  18. 24 5月, 2011 1 次提交