- 02 10月, 2010 8 次提交
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由 kishore kadiyala 提交于
On OMAP4, MMC2 controller has eMMC which draws power from VAUX regulator on TWL. Though the eMMC supports dual voltage[1.8v/3v] as per ocr register, its VCC is fixed at 3V for operation. With this once the mmc core selects the minimum voltage[1.8] supported based on the ocr value read from OCR register, eMMC will not get detected. Thus the platform data for MMC2 is updated with ocr mask and same will be communicated to core which will set the regulator to always operate at 3V when ever turned ON. Cc: Tony Lindgren <tony@atomide.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Madhusudhan Chikkature <madhu.cr@ti.com> Cc: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 kishore kadiyala 提交于
In OMAP4, as per new PM programming model, the legacy registers which were there in OMAP3 are all shifted by 0x100 while new one's are added from offset 0 to 0x10. For OMAP4, the register offset appending of 0x100 done in devices.c currently, is moved to driver file.This change fits in for current implementation as well as once the driver undergoes hwmod adaptation. Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Madhusudhan Chikkature <madhu.cr@ti.com> Cc: Adrian Hunter <adrian.hunter@nokia.com> Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Benoit Cousson 提交于
Avoid possible crash if CONFIG_MMC_OMAP_HS is not set Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Madhusudhan Chikkature <madhu.cr@ti.com> Cc: Adrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Madhusudhan Chikkature 提交于
The omap4 es2 hsmmc has a updated soft reset logic.After the reset is issued monitor a 0->1 transition first. The reset of CMD or DATA lines is complete only after a 0->1->0 transition of SRC or SRD bits. Signed-off-by: NMadhusudhan Chikkature <madhu.cr@ti.com> Tested-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Grazvydas Ignotas 提交于
Add platform data to make use of newly added charging driver. Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Grazvydas Ignotas 提交于
Instead of enabling the wifi module explicitly using GPIO, add a fixed regulator and hook it to MMC host card power control. This way it will only be enabled when SDIO subsystem wants to talk to it, saving power (as done by Zoom boards). Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sanjeev Premi 提交于
The existing definitions for cpu revision used upper nibble in the bits[15:08]. With OMAP3630, definitions use lower nibble. This patch unifies the definitions to start at lower nibble. Signed-off-by: NSanjeev Premi <premi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Otherwise the muxname passed to the function will get truncated. Based on an earlier patch by rockefeller.lin@innocomm.com. Reported-by: rockefeller.lin@innocomm.com Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 30 9月, 2010 2 次提交
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由 Kevin Hilman 提交于
Disable CPUfreq since 1) is not yet supported in mainline, and 2) the current driver fails to suspend properly Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kevin Hilman 提交于
In working towards a smaller default kernel, only devices used for early boot should be built in. Toward that end, build the following as modules by default: - bluetooth - audio: ALSA, ASoC - WLAN Uncompressed kernel size comparison: Before: text data bss dec hex filename 6557576 465088 5616024 12638688 c0d9e0 vmlinux After: text data bss dec hex filename 5616572 436448 5610800 11663820 b1f9cc vmlinux Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 29 9月, 2010 5 次提交
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由 Tim Nordell 提交于
Enable SMSC911x Ethernet driver for LogicPD's OMAP 3530 LV SOM and OMAP 35x Torpedo board. Signed-off-by: NTim Nordell <tim.nordell@logicpd.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tim Nordell 提交于
Introduce of a generic way to setup smsc911x based Ethernet controller connected to GPMC similar to gpmc-smc91x but without timing setup. Signed-off-by: NTim Nordell <tim.nordell@logicpd.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tim Nordell 提交于
Add low-level initialization for hsmmc controller for LogicPD's OMAP 3530 LV SOM and OMAP 35x Torpedo board. Signed-off-by: NTim Nordell <tim.nordell@logicpd.com> [tony@atomide.com: updated for the recent mmc platform init changes] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tim Nordell 提交于
Adding support for LogicPD's OMAP 3530 LV SOM and OMAP 35x Torpedo board. Signed-off-by: NTim Nordell <tim.nordell@logicpd.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 matt mooney 提交于
Unnecessary cast from void* in assignment. Signed-off-by: Nmatt mooney <mfm@muteddisk.com> Acked-by: NHiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 9月, 2010 25 次提交
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由 Igor Grinberg 提交于
add support for TI HECC. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Igor Grinberg 提交于
add support for NAND flash. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Igor Grinberg 提交于
add support for hsusb host ports 1, 2 and on-module usb hub. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Igor Grinberg 提交于
add support for v3020 rtc. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Igor Grinberg 提交于
Add basic suppot, enable uart and led. Signed-off-by: NIgor Grinberg <grinberg@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
When changing the L3 clock frequency, the CPU is executing from internal RAM and the SDRC clock is disabled. During this time accesses made to external DDR are stalled. If the ARM subsystem attempts to access the DDR while the SDRC clock is disabled this will stall the CPU until the access to the SDRC timeouts. A timeout on the SDRC should never occur. Once a timeout occurs all the following accesses will be aborted and the DDR is no longer accessible. Although the code being executed in the internal RAM does not directly access the DDR, it was found that the branch prediction logic in the CPU may cause the CPU to prefetch code from a DDR location while the SDRC clock is disabled. This was causing an SDRC timeout which resulted in a system hang. This patch fixes this problem by ensuring the branch prediction logic is disabled while changing the L3 clock frequency. The branch prediction logic is disabled by clearing the Z-bit in the ARM CTRL register. Disabling the branch prediction logic does not have any noticable impact on the execution time of this code section. The hardware observability signals were used to monitor the sdrc idle time with and without this patch when operating at different CPU frequencies (150MHz, 500MHz and 600MHz) and the total sdrc idle time when changing frequenct was in the range of 9-11us. This was measured on an omap3430 SDP running the omapzoom p-android-omap-2.6.29 branch. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Tony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
This patch has multiple fixes together. To ensure that git bisect work across commits, all changes are clubbed together 1. Move the common control base address to control core 2. Remove the manually coeded defines and use the ones from headers. 3. Fix the the status register define in id.c for OMAP4 4. Fix all the register define in hsmmc.c 5. Use the control pad accessor API for omap4 hsmmc register accesses Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Santosh Shilimkar 提交于
On OMAP4, control module is divided into 4 separate IPs - OMAP44XX_CTRL_MODULE_CORE - OMAP44XX_CTRL_MODULE_PAD_CORE - OMAP44XX_CTRL_MODULE_WKUP - OMAP44XX_CTRL_MODULE_PAD_WKUP This patch adds all the omap4 control module register data and includes them in the common control.h The register data is autogenerated from the codebase thanks to Benoit Cousson efforts Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Santosh Shilimkar 提交于
On OMAP4 control pad are not addressable from control core base. So the common omap_ctrl_read/write APIs breaks Hence export separate APIs to manage the omap4 pad control registers. This APIs will work only for OMAP4 Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Santosh Shilimkar 提交于
On omap4 control module is divided in four IP blocks. - CTRL_MODULE_CORE 0x4a002000 - CTRL_MODULE_PAD_CORE 0x4a100000 - CTRL_MODULE_WKUP 0x4a30c000 - CTRL_MODULE_PAD_WKUP 0x4a31e000 Addressing all the modules with single base address is not possible considering 16 bit offsets. The mux code manages the pad core and pad wakeup related base address inside the mux framework. For other usage only control core and control pad bases are necessary. So this patch maps only needed pad control base address which is used by device drivers and infrastructure code The main control core base is still kept same in this patch to keep git-bisect working. This will be fixed in the relevant patch in this series. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
Fix a few OMAP4430 clock tree problems after the recent manual merge of the various ES2 clock patches: - usim optional clock and its parent had the same name, rename the parent usim_fclk -> usim_ck - OPTFCLKEN_CLK32K is not handled anymore by the USBPHYOCP2SCP module in ES2 Create a new clock that belongs to CM_ALWON_USBPHY_CLKCTRL register This patch depends on some of the PRCM macro updates from Rajendra. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> [paul@pwsan.com: tweaked patch description] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Rajendra Nayak 提交于
DSS on ES2 supports only OSWR, hence remove the support for CSWR from the powerdomain framework. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NBenoît Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Rajendra Nayak 提交于
4430 ES2 has a few new registers added and a few modified from ES1. This patch adds all the register changes in PRM and CM for OMAP4430 ES2. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NBenoît Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Rajendra Nayak 提交于
This patch updates the PRM and CM register bitshifts and masks for OMAP4430 ES2.0. Replace as well the BITFIELD macro with the shift operator in order to be consistent with the previous OMAP2 & 3 format. Sort the register list in comments in order to have a consistent register order and avoid futur change during code generation. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NBenoît Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Benoit Cousson 提交于
OMAP4 IP optional clocks require explicit enable in module CTRLCLK register. In order to allow that we have to create artificial clock nodes that represent this clock inputs in the IP. Notes: - Temporary use OMAP3 names for GPIO optional clocks until the GPIO hwmod convertion is done. It will enforce the usage of OMAP4 names as the reference. - Temporary use OMAP3 names for TIMER main clock (gptX_fck) until TIMER hwmod convertion is done. During that convertion, the new name will have to be used. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
The OMAP4 hwmod data introduced the new naming convention for TI IPs (See patch OMAP4: hwmod: Add partial hwmod support for OMAP4430 ES1.0) The leaf clock names are using the same IP name and thus must be modified to match the clock populated in the hwmod data. - Fix some leaf clocks nodes that were using a _iclk instead of the _fclk prefix. - Fix some wrong interface clock name for master IPs connected to interconnect. Please not that due to the fact that nodes are sorted by name, the name change will introduce a quite ugly diff a little bit hard to follow. Timers clock con_id is still using the old gptX_fck name until the gptimer driver is updated to omap_device framework. Timers entries in hwmods DB are still disabled until the migration if timer to platform_driver + omap_hwmod. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> [paul@pwsan.com: manually resolved conflicts with Rajendra's clock patch] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Rajendra Nayak 提交于
This patch updates the clock tree with all the changes in OMAP4430 ES2. clock nodes added -1- tie_low_clock_ck -2- abe_dpll_bypass_clk_mux_ck clock nodes deleted -1- dpll_sys_ref_clk -2- per_sgx_fclk -3- usbphyocp2scp_ick Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NBenoît Cousson <b-cousson@ti.com> [paul@pwsan.com: added comment re ES1 clocks to top of file] Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Lennert Buytenhek 提交于
update OMAP Kconfig help texts for all supported SoC models Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
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由 Tony Lindgren 提交于
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由 Tony Lindgren 提交于
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由 Sukumar Ghorai 提交于
wires variable is renamed, extended and this single variable to be used to pass the platform capabilities, e.g DDR mode. Also removed the hardcoded value was using as bus-width. Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Jarkko Nikula 提交于
This 'legacy' OMAP2420 McBSP2 muxing code is currently broken after recent conversion to new mux code. The omap_mcbsp_request calling this code is usually called after booting whereas the omap_mux_init_signal is __init marked so null pointer dereference would occur. Fix this by removing the muxing code and let the bootloader or board file to do it if necessary. Remove also omap2_mcbsp_ops as there is no use for it. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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